TMS570LS3137 - PBIST#4

Suma VL

Other Parts Discussed in Thread: HALCOGEN

Hello,

We are working on PBIST#4 errata work around.

1) We would like to know what is the probability of this occurance?

2) Is there way we get to know that the PBIST was not executed properly - Probably the time taken to excute the PBIST ? Or any other way to know that PBIST was not executed?

Thanks and Regards,

Suma

over 11 years ago

0 Leo Huang1 over 11 years ago

TI__Prodigy 710 points

Thank you for posting on the Hercules forum. One of our engineers has been notified of this issue and will answer back to you as soon as possible.

0 Dave Livingston over 11 years ago in reply to Leo Huang1

TI__Expert 4695 points

Suma,

The severity of this errata is medium, and the probability is low but Texas Instruments recommends implementing the work around as described in the errata.

The latest workaround implemented in HALCoGen 3.08.00 uses execution time to make sure PBIST executed in the expected time.

Thank you,

Forum Support

0 Pashan None over 11 years ago in reply to Dave Livingston

Genius 5660 points

Hello Support,

1> Does PBIST#4 errata occurs for a particular sample of the device in question for every PORRST cycle?
Or,
2> PBIST#4 Errata can occur in all samples of the device during some PORRST cycle?
Or,
3> Does PBIST#4 errata occurs for a particular sample of the device in question for some PORRST cycle?

Which one of the above is TRUE [Statement 1 or 2 or 3]?
Thank you.
Regards
Pashan

0 Chuck Davenport over 11 years ago in reply to Pashan None

TI__Guru 59540 points

Hello Pashan,

The issue has a low probability of occurance on any unit. As such TI recommends implementation of the workaround to avoid the issue.

Regards,

Chuck Davenport

Arm-based microcontrollers

Arm-based microcontrollers forum

TMS570LS3137 - PBIST#4