TMS570LS3137, SCILIN, CLEARINT register

Dear friends,

I use Sci2 (LIN) RX and TX dma in my code, DMA BTC irq is enabled and this irq calls:

void dmaGroupANotification(dmaInterrupt_t inttype, sint32 channel)
{
	if(channel == DMA_CH9)
	{
		DMA_TX_Flag = 0x5555BBBB;
		scilinREG->CLEARINT |= SCI_TX_DMA;
	}
	else if(channel == DMA_CH10)
	{
		DMA_RX_Flag = 0x5555AAAA;
	}
}

function, where SCI_TX_DMA = (1 << 16),

I expect to disable only TX_DMA, but, writing any value to scilinREG->CLEARINT register causes this register to change its value to 0, so my RX_DMA goes disabled mode.

How can I successfully write to this register. Register definition is:

#define scilinREG ((sciBASE_t *)0xFFF7E400U)

sciBASE_t is:

typedef volatile struct sciBase
{
    uint32 GCR0;          /**< 0x0000 Global Control Register 0 */
    uint32 GCR1;          /**< 0x0004 Global Control Register 1 */
    uint32 rsdv1;         /**< 0x0008 Global Control Register 2 */
    uint32 SETINT;       /**< 0x000C Set Interrupt Enable Register */
    uint32 CLEARINT;      /**< 0x0010 Clear Interrupt Enable Register */
    uint32 SETINTLVL;    /**< 0x0014 Set Interrupt Level Register */
    uint32 CLEARINTLVL;   /**< 0x0018 Set Interrupt Level Register */
    uint32 FLR;           /**< 0x001C Interrupt Flag Register */
    uint32 INTVECT0;      /**< 0x0020 Interrupt Vector Offset 0 */
    uint32 INTVECT1;      /**< 0x0024 Interrupt Vector Offset 1 */
    uint32 FORMAT;        /**< 0x0028 Format Control Register */
    uint32 BRS;           /**< 0x002C Baud Rate Selection Register */
    uint32 ED;            /**< 0x0030 Emulation Register */

    union                                    //TODO: DMA for RX için bunu RD yerine ekle, sci.c içinde gereken değişiklikleri yap
    {
     unsigned int RD;
     struct
     {
     unsigned int : 24;
     unsigned char RD_UC;
     }SCIRD_ST;
    }SCIRD_UN;

    //uint32 RD;            /**< 0x0034 Receive Data Buffer */

    union                                      /* 0x38      */
	{
	 unsigned int TD;
	 struct
	 {
	 unsigned int : 24;
	 unsigned char TD_UC;		/*0x3B*/	//Big endian uC: TMS570
	 }SCITD_ST;
	}SCITD_UN;

    //uint32 TD;            /**< 0x0038 Transmit Data Buffer */
    uint32 PIO0;          /**< 0x003C Pin Function Register */
    uint32 PIO1;          /**< 0x0040 Pin Direction Register */
    uint32 PIO2;          /**< 0x0044 Pin Data In Register */
    uint32 PIO3;          /**< 0x0048 Pin Data Out Register */
    uint32 PIO4;          /**< 0x004C Pin Data Set Register */
    uint32 PIO5;          /**< 0x0050 Pin Data Clr Register */
    uint32 PIO6;          /**< 0x0054: Pin Open Drain Output Enable Register */
    uint32 PIO7;          /**< 0x0058: Pin Pullup/Pulldown Disable Register */
    uint32 PIO8;          /**< 0x005C: Pin Pullup/Pulldown Selection Register */
    uint32 rsdv2[12U];    /**< 0x0060: Reserved                               */
    uint32 IODFTCTRL;     /**< 0x0090: I/O Error Enable Register */
} sciBASE_t;

which is in the  Halcogen generated file: reg_sci.h

I know it is a volatile struct, so tried to modify it into irq subroutine, but it is also unsuccessfull.

So, what I need is, just to disable TX_DMA, but not touch RX_DMA

I do not prefer disabling TX pin by TXENA, SCILIN->CLEARINT is best solution if it works.

thanks in advance

regards

Levent