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Does MINITGCR based Initialization with Parity/ECC enabled can set ESM Error?

Other Parts Discussed in Thread: TMS570LS0432

Hello Support,

When I perform MINITGCR based Memory Hardware Initialization for any RAM group with respective ECC or Parity enabled, if there is a corresponding RAM cell error, will there be respective ESM Channel Error Flag will get SET?

Or, ESM Channel Error Flag only set for CPU/Peripheral based READ or RMW access only?

Thank you,
Regards
Pashan

 

 

  • Hello:

    We have received your post and we will come back to you soon.

    Regards.

  • Hello Pashan,

      The auto-initialization is done by the respective memory wrappers (i.e. TCRAMW, NHET, MiBSPI and etc)  to only write zeros and its corresponding ECC/parity to the memory banks. This operation only involves writing and there is no ECC checking. If the initialization is not done properly for whatever reason (i.e. latent faults), the ESM will be notified when the memory is either read by the CPU or the module's state machine provided the ECC/parity checking is enabled in the respective module.

    regards,

    Charles 

  • Hello Charles,

    Thank you for the exact answer.
    Next Question :

    Does PBIST Failure detection in the RAM [Peripheral RAM or TCRAM] will generate ESM errors in any way during the PBIST Selftest for different types of RAM Groups?

    Or, is it only FSRF0 Bit [being SET] of PBIST for TMS570LS0432 device [because it has only one PORT -- Port0]?

    Thank you.
    Regards
    Pashan

  • Hello Pashan,

      Your understanding is correct. PBIST failure in the peripheral RAM or TCRAM will not generate ESM errors. When the PBIST is done, a PBIST done interrupt (VIM channel 85) will be asserted. You will need to examine FSRFx register to check the fail status and also the RGS/RDS values of the RAMT register to find out which specific RAM/ROM fails the PBIST test.

    regards,

    Charles