Other Parts Discussed in Thread: TMS570LS3137
Hi Forum team,
I have a question regarding TMS570LS3137 input multiplexing.
According to the datasheet (SPNS164B.pdf), GIOA[2] and NHET2[0] share the same ball C1.
The input multiplexing is controlled by the register PINMMR2. The bit 0 is for GIOA[2], and the bit 3 is for NHET2[0].
If I configure the lowest 8 bits of PINMMR2 to 0x00, I thought that then the GIOA[2] will not get any bus event (rising or falling edge on C1). But in the test, the IRQ is still triggered.
In the TRM (SPNU499B.pdf), Section 4.3.2, I have found the following description:
Input multiplexing is not required for the 337BGA package except for GIOB[2] and all the SPI4 signals.
NOTE: Inputs are broadcast to all multiplexed functions
The input signals are broadcast to all modules hooked up to a terminal. The application must
ensure that modules that are not being used in the application do not react to a change on
their input functions. e.g. a GIO signal toggle can trigger an interrupt request, when the
application actually is using the function multiplexed with this GIO signal.
So my understanding of this description is that GIOA[2] and NHET2[0] will both see the ball event any way, even if the PINMMR2[7:0] is 0x00. This can explain why I can see the bus event (and why the GIO IRQ is triggered). Please confirm.
If this is true, then what is the use of the register PINMMR2? Which kind of influence does it have, if the bit 0 or bit 3 is set?
Thank you!
Best regards,
Libo
