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Frequency limit for DMA event

matteo lucarelli
Genius 3265 points

Hi,

I'm working with a RM48HDK. I'm using RTI to generate DMA events. For every event the DMA performs a single transfer of 32bits. I'm running in problems at events frequency over 2/3 MHz.

Which is the limit? How much time is needed by DMA to perform a single 32bit transfer?

Thank you

  • 0
    TI__Guru 68920 points

    Matteo,


    Are you attempting to DMA on/off chip?  Sounds like it might be the case.

    If so what are your EMIF settings.  If not where are your source and destination addresses pointing to.

    The DMA time will of course depend on the access time to the source & destination.

  • 0 in reply to Anthony F. Seely
    Genius 3265 points

    Antony,

    the source here is a RAM buffer and the destination is a DIO port. no EMIF involved.

  • 0 in reply to matteo lucarelli
    TI__Guru 68920 points

    Matteo,

    What frequencies are your clocks running.   The 2/3 MHz seems like a reasonable number,  maybe a little on the low side if this is *all* you're doing but if you have other DMA events going on at the same time, or other peripheral accesses by the CPU this could be just about right.

    Off hand I know we've timed CPU accesses to the DIO at 22 cycles (CPU cycles) or 25-26 cycles if the clock divider is higher.   I think about 10 cycles of that was in the CPU's AXI bus.  The DMA wouldn't have this but probably has something near the same when you consider that it has to read the data first from the CPU's RAM.   So that could put you into the 5-10MHz region alone (depending on the clock settings).  Then if you have other events going on that arbitrate for the switch fabric - ie.. other DMA channels or CPU writing to the peripherals on the same bus segment as the GIO - this could easily drop in half again.

    So I think your result can be reasonably be explained.  We don't really spec any sort of 'limit' though because of the sort of arbitration that might be going on.  

    This might not be the best solution for you if you need IOs toggling at a high rate -- you might want to consider whether N2HET can do the same job.

     

  • 0 in reply to Anthony F. Seely
    Genius 3265 points

    Antony, you answer is complete as usual.

    In fact my CPU is doing a lot of other tasks and there's another DMA channel running at ~1MHz, so this " little on the low side" performance seems reasonable.

    That's all I need to know.

    Thank you