TM4C Sleep and Deep Sleep Power Configuration

Hello Scott,

You can use the API's SysCtlDeepSleepPowerSet and SysCtlSleepPowerSet to configure the Deep Sleep and Sleep Power Config register

Regards

Amit Ashara

Which API am I to use for these functions, they are not in my sysctl.h

Hello Scott,

Which version of TIVAWare release are you using

Regards

Amit Ashara

TivaWare_C_Series-1.1

Hello Scott

The function API's are in there in the latest release. You may want to update to TivaWare_C_Series-2.0.1.11577

In case there is a specific reason not to use it, I would suggest to still download the same and keep it for reference to API's in the immediate future.

Regards

Amit Ashara

is that part of the update list above (generated by CCS check for updates) or do I have to go to a specific url.

Is it a seamless update, will my ccs project add the new path to my project search paths?

Is 2.0.1.1xxx part of the list included in my "paste"?

Is it a seamless update, that is will my project search paths be updated also?

Hello Scott,

No. It was TIVAWare 1.1 in the previous post. I am not sure if CCS gets the update, so you have to go to the TIVA web page

http://www.ti.com/lsds/ti/microcontroller/tiva_arm_cortex/c_series/tools_software.page

The API's should be a seamless update but paths may need to be worked

Regards

Amit Ashara

I went to the url and downloaded the latest Tiva Ware driver library.

I ran the *.exe and it has created and loaded files into c:\ti\TivaWare_C_Series-2.0.1.11577.

I noticed the new directory is subset of the previous, TivaWare_C_Series-1.1.

How do manage resources from these two sources on a project.

Should I upgrade the entire TivaWare package to 2.0.1.11577?

Hello Scott,

Yes, my suggestion would be to upgrade to the new package.

Regards

Amit Ashara

Thanks for your help.

Device: TM4C1230H

Tiva Ware C Series 2.0.1.11577

use: SysCtlDeepSleepPowerSet(SYSCTL_FLASH_LOW_POWER | SYSCTL_SRAM_LOW_POWER);

sysclt.c API: specifies param ui32Config as logical or of

SYSCTL_FLASH_NORMAL

SYSCTL_FLASH_LOW_POWER

SYSCTL_SRAM_NORMAL

SYSCTL_SRAM_STANDBY

SYSCTL_SRAM_LOW_POWER

However, these input parameters are NOT DEFINED anywhere in Tiva Ware C Series 2.0.1.11577.

Where are they?

They are in the next release, these were unfortunately omitted from previous releases. 

Here are the definitions if you need them before the next TivaWare release is out.

//*****************************************************************************
//
// The following are values that can be passed to the SysCtlSleepPowerSet() and
// SysCtlDeepSleepPowerSet() APIs as the ui32Config parameter.
//
//*****************************************************************************
#define SYSCTL_LDO_SLEEP        0x00000200  // LDO in sleep mode
                                            // (Deep Sleep Only)
#define SYSCTL_TEMP_LOW_POWER   0x00000100  // Temp sensor in low power mode
                                            // (Deep Sleep Only)
#define SYSCTL_FLASH_NORMAL     0x00000000  // Flash in normal mode
#define SYSCTL_FLASH_LOW_POWER  0x00000020  // Flash in low power mode
#define SYSCTL_SRAM_NORMAL      0x00000000  // SRAM in normal mode
#define SYSCTL_SRAM_STANDBY     0x00000001  // SRAM in standby mode
#define SYSCTL_SRAM_LOW_POWER   0x00000003  // SRAM in low power mode

Can you help me understand why I am only able to reduce current draw to 8.9mA when entering DEEP SLEEP using the following API's:

// Configuration for SHUT DOWN

//====================

// Peripherals

// Sleep and Deep Sleep clock gating enabled, ROM_SysCtlPeripheralClockGating(1);

// ROM_SysCtlPeripheralDeepSleepDisable() for all known peripherals

Proj_Peripheral_Config_ShutDown();

//====================

//====================

// ROM_SysCtlPeripheralPowerOff() for all known peripherals

//Proj_Peripheral_PowerOff();

//====================

//====================

// LDO voltage in DEEP SLEEP

SysCtlLDODeepSleepSet(SYSCTL_LDO_0_90V);

//====================

//====================

// SRAM and FLASH modes in DEEP SLEEP

SysCtlDeepSleepPowerSet(SYSCTL_LDO_SLEEP | SYSCTL_TEMP_LOW_POWER | SYSCTL_FLASH_LOW_POWER | SYSCTL_SRAM_LOW_POWER);

//SysCtlDeepSleepPowerSet(SYSCTL_FLASH_LOW_POWER | SYSCTL_SRAM_LOW_POWER);

//====================

// NOT present in sysctl.c or ROM driver api

// SysCtlLPCLowPowerConfigSet(SYSCTL_LPCLPWR_SRAM_OFF);

//====================

// power down clock in DEEP SLEEP

SysCtlDeepSleepClockConfigSet(SYSCTL_DSLP_DIV_64, SYSCTL_DSLP_PIOSC_PD);

//====================

// SHUT DOWN mode, only a hardware reset can restore operation

while (1)

{

    SysCtlDeepSleep();

    SysCtlDelay(100);

}

Hi Scott,

Can you confirm the following

1. In the function Proj_Peripheral_Config_ShutDown(); you are setting-clearint the Deep Sleep Clock Enable for the peripherals.

2. In the same function you are setting SysCtlPeripheralClockGating(true)

3. The Deep Sleep Clock Source is being set as MOSC

4. The debugger is disconnected (not just disconnect from the CCS window). The Debug Enable is a sticky bit in CM4. One sure shot way is to remove the power and then connect back the power

Regards

Amit

Hello Amit,

Regarding (1):

Sample code from Proj_Peripheral_Config_ShutDown():

void Proj_Peripheral_Config_ShutDown(void)

{

    ROM_SysCtlPeripheralClockGating(1);

     //============================================================

     // all peripherals disabled during SHUT DOWN

    ROM_SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_ADC0);

    ROM_SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_ADC1);

    ROM_SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_CAN0);

    ... repeated for all known peripherals in TM4C1230

}

Not sure what API you are referring to "Deep Sleep Clock Enable".

Regarding (3):

In Main.c, I set:

ROM_SysCtlMOSCConfigSet(SYSCTL_MOSC_NO_XTAL);

ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_INT | SYSCTL_MAIN_OSC_DIS);

// Set the system clock for DEEP SLEEP operation.

// Precision internal oscillator (i.e. SYSCTL_SYSDIV_1).

ROM_SysCtlDeepSleepClockSet(SYSCTL_DSLP_DIV_1 | SYSCTL_DSLP_OSC_INT);

In the preparation for SHUT DOWN of my application (shown previously), I set:

// power down clock in DEEP SLEEP

SysCtlDeepSleepClockConfigSet(SYSCTL_DSLP_DIV_64, SYSCTL_DSLP_PIOSC_PD);

Regarding (4):

The SHUT DOWN current draw is 10+ mA with ICD connected. After disconnecting ICD and resetting my target,

the SHUT DOWN current draw is 8.9mA.

Hi Scott,

So #1 and #2 are taken care by the Proj_Peripheral_Config_ShutDown function call.

For #3, the second API SysCtlDeepSleepClockConfigSet is overwriting the first API. an you put a break point at SysCtlDeepSleep and check the value of the System Control register DSLPCLKCFG?

Secondly you want to set the deep sleep clock source as PIOSC in the ROM_SysCtlDeepSleepClockSet and later in the SysCtlDeepSleepClockConfigSet you are requesting it to be Powered Down. This is a conflicting condition.

Regards

Amit Ashara

The application has three possible modes:

a. running - process pending project events

b. DEEP SLEEP - no project events pending, enable minimum set of peripherals and interrupts, wait for interrupt

c. SHUT DOWN - a forced event/command, halt all activity, enter MINIMUM current draw, RESET required to exit

Modes (a) and (b) are alternating continuously. Mode (c) is entered only after a command.

The program flow (and my intention) is as follows:

Main.c sets normal operating conditions of:

1. no MOSC xtal

2. System Clock = PIOSC at 16.0MHz

3. Deep Sleep system clock = PIOSC at 16.0MHz

4. call Proj_Peripheral_Config_DeepSleep(), enables a minimum set of peripherals

5. Configure project GPIO, WDOG 0, SysTick, Timers, UARTS, SSI, ADC, ...

6. call Loop.c

Loop.c (the ROOT or IDLE task/thread)

if (project event)

{

    // process event, event function calls may result in a new event, enabled interrupt, etc.

}

else if (test for project command to force SHUT DOWN)

{  

    // ALL pending events must be processed before executing SHUT DOWN.

    // THIS MODE is intended to draw the ABSOLUTE minimum current.

    // RESET required to exit.

    // Yes, I am trying to reconfigure elements of DEEP SLEEP 

    // for the SPECIAL condition of SHUT DOWN. 

    // IT ALSO MAKES SENSE TO ME TO DISABLE MOST INTERRUPTS, BUT SO FAR THIS

    // HAS YIELDED ERRATIC RESULTS IN CURRENT DRAW, WDOG RESETS, AND FAULTS

    // set peripheral config for SHUT DOWN,

    Proj_Peripheral_Config_ShutDown();

    // set LDO Deep Sleep voltage

    SysCtlLDODeepSleepSet(SYSCTL_LDO_0_90V);

    // set SRAM and FLASH Deep Sleep modes

   SysCtlDeepSleepPowerSet(SYSCTL_LDO_SLEEP | 

        SYSCTL_TEMP_LOW_POWER  |  

        SYSCTL_FLASH_LOW_POWER |

        SYSCTL_SRAM_LOW_POWER);

    // set Deep Sleep Clock for power down

    SysCtlDeepSleepClockConfigSet(SYSCTL_DSLP_DIV_64, SYSCTL_DSLP_PIOSC_PD);

    // enter and remain in Deep Sleep until hardware RESET

    while (1)

    {

        SysCtlDeepSleep();

        SysCtlDelay(100);

    }

}

else (opportunity to enter DEEP SLEEP, i.e. no pending project events)

{

    // I will probably have MORE QUESTIONS here, but my goal would be enter minimum current draw

    // for my minimum set of peripherals and interrupts enabled

    // as set in Main.c

}

Hi Scott,

Everything is correct except the following should not be called for TM4C123

SysCtlDeepSleepClockConfigSet(SYSCTL_DSLP_DIV_64, SYSCTL_DSLP_PIOSC_PD);

I can try the configuration you have already given to co-relate to the current you have mentioned. Please note that I will assume that no peripheral is to be clocked in deep sleep mode!!! I should have data tomorrow.

Also another factor is the IO's connected to other devices. If they are in output mode and are driven high in idle state, they could be sourcing current from TM4C123 to other devices, causing the current to be higher as well. Could you check that as well

Regards,

Amit Ashara

According to page 244 of the Tm4C1230H data sheet,

PIOSCPD: 0x00000002 - is a bit set in the Deep Sleep Clock Configuration register (base 0x400Fe000, offset 0x144) that allows the PIOSC to be powered down during DEEP SLEEP.

SysCtlDeepSleepClockConfig(): uses

if(CLASS_IS_BLIZZARD)

{

//

// Set the deep-sleep clock configuration.

//

HWREG(SYSCTL_DSLPCLKCFG) = (ui32Config & ~SYSCTL_DSLPCLKCFG_D_M) |

((ui32Div - 1) << SYSCTL_DSLPCLKCFG_D_S);

}

else

{

//

// Set the PIOSC power down bit.

//

if(ui32Config & SYSCTL_DSLP_PIOSC_PD)

{

ui32Value |= SYSCTL_DSCLKCFG_PIOSCPD;

}

//

// Update the deep-sleep clock configuration.

//

HWREG(SYSCTL_DSCLKCFG) = ui32Value;

where;

#define SYSCTL_DSCLKCFG_PIOSCPD 0x80000000 // PIOSC Power Down

#define SYSCTL_DSCLKCFG 0x400FE144 // Deep Sleep Clock Configuration

so I see a difference between the data sheet bit position (0x00000002) and the #define 0x80000000.

Do I need to use  HWREG(SYSCTL_DSCLKCFG) |= 0x00000002; ????

How do I achieve the IDD DEEP SLEEP current of 1mA that is published in the TM4C1230H data sheet???

Hi Scott,

As I mentioned earlier, please remove the line containing the API

SysCtlDeepSleepClockConfigSet(SYSCTL_DSLP_DIV_64, SYSCTL_DSLP_PIOSC_PD);

Instead use

SysCtlDeepSleepClockSet(SYSCTL_DSLP_DIV_1|SYSCTL_DSLP_OSC_INT30|SYSCTL_DSLP_PIOSC_PD);

This will make the device enter deep sleep with 30KHz LFIOSC. If you check the current consumtion table in the electrical specification the 1mA current is for FLASHPM=0x2, Peripheral all OFF and clock as 30KHz LFIOSC with LDO at 1.2V.

I would be needing some additional data. Please put a break point on the function SysCtlDeepSleep and then publish the content of the following system control registers

SYSCTL.RCC

SYSCTL.DSLPCLKCFG

SYSCTL.DSPLPWRCFG

SYSCTL.LDODPCTL

SYSCTL registers from offset 0x800 to 0x85C

Regards

Amit Ashara

inserting file, I am tired of this input window

// CODE FOR SHUT DOWN
	// Configuration for SHUT DOWN

	//====================
	// Peripherals
	// Sleep and Deep Sleep clock gating enabled, ROM_SysCtlPeripheralClockGating(1);
	// ROM_SysCtlPeripheralDeepSleepDisable() for all known peripherals
	Proj_Peripheral_Config_ShutDown();
	//====================

	//====================
	// ROM_SysCtlPeripheralPowerOff() for all known peripherals
	//Proj_Peripheral_PowerOff();
	//====================

	//====================
	// LDO voltage in DEEP SLEEP
	SysCtlLDODeepSleepSet(SYSCTL_LDO_0_90V);
	//====================

	//====================
	// SRAM and FLASH modes in DEEP SLEEP
	SysCtlDeepSleepPowerSet(SYSCTL_LDO_SLEEP | SYSCTL_TEMP_LOW_POWER | SYSCTL_FLASH_LOW_POWER | SYSCTL_SRAM_LOW_POWER);
	//SysCtlDeepSleepPowerSet(SYSCTL_FLASH_LOW_POWER | SYSCTL_SRAM_LOW_POWER);
	//====================

	// NOT present in sysctl.c or ROM driver api
	// SysCtlLPCLowPowerConfigSet(SYSCTL_LPCLPWR_SRAM_OFF);

	//====================
	// clock in DEEP SLEEP
	SysCtlDeepSleepClockSet(SYSCTL_DSLP_DIV_1 | SYSCTL_DSLP_OSC_INT30 | SYSCTL_DSLP_PIOSC_PD);
	//====================

	// SHUT DOWN mode, only a hardware reset can restore operation
	while (1)
	{
		SysCtlDeepSleep();
		SysCtlDelay(100);
	}

// ISSUEING SHUTDOWN COMMAND

	[C],VERSION,2nd Gen GPSC MOBILE V0.067 02-11-2014,(c)RSC.
	MOBILE> ,1388,0.067,16000000,0,32,64,96,128,160,192,224,0x00000000
	MOBILE>
	[N],StopNav,0

	MOBILE>
	MOBILE> SHUTDOWN
	[C],SHUTDOWN

	[N],StopNav,1

	SHUTDOWN

// Current draw when 8.37mA

//Register Dump in  SysCtlDeepSleep()

RCC (0x400FE050)		00000000
DSLPCLKCFG (0x400FE144)	00000032
DSPLPWRCFG (can't find this register in data sheet or API, can you provide)
LDODPCTL (can't find this register in data sheet or API, can you provide)

SYSCTL registers from offset 0x800 to 0x85C
#define SYSCTL_DCGCWD           0x400FE800  // Watchdog Timer Deep-Sleep Mode

ADDRESS		DATA
0x400FE800	00000000	00000000	00000000	00000000	00000000	00000001	00000000	00000000

0x400FE820	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000

0x400FE840	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000

0x400FE860	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000

For lowest current:

If I have GPIOs configure as outputs, is it sufficient to set them low or do I need to reconfigure as an input.

What about pins used by peripherals: UART0, UART2, and SSI1? Do I need to change any of these?

The following is from sysctl.c.

It states "

//! This function allows the power to a peripheral to be turned off. The

//! peripheral continues to receive power when its clock is enabled, but

//! the power is removed when its clock is disabled.

"

How does one disable the clock to a peripheral in the TM4C1230???????????

//*****************************************************************************

//

//! Powers off a peripheral.

//!

//! \param ui32Peripheral is the peripheral to be powered off.

//!

//! This function allows the power to a peripheral to be turned off. The

//! peripheral continues to receive power when its clock is enabled, but

//! the power is removed when its clock is disabled.

//!

//! The \e ui32Peripheral parameter must be only one of the following values:

//! \b SYSCTL_PERIPH_ADC0, \b SYSCTL_PERIPH_ADC1, \b SYSCTL_PERIPH_CAN0,

//! \b SYSCTL_PERIPH_CAN1, \b SYSCTL_PERIPH_CAN2, \b SYSCTL_PERIPH_COMP0,

//! \b SYSCTL_PERIPH_COMP1, \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_EEPROM0,

//! \b SYSCTL_PERIPH_EPI0, \b SYSCTL_PERIPH_FAN0, \b SYSCTL_PERIPH_FAN1,

//! \b SYSCTL_PERIPH_GPIOA, \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC,

//! \b SYSCTL_PERIPH_GPIOD, \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF,

//! \b SYSCTL_PERIPH_GPIOG, \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_GPIOJ,

//! \b SYSCTL_PERIPH_GPIOK, \b SYSCTL_PERIPH_GPIOL, \b SYSCTL_PERIPH_GPIOM,

//! \b SYSCTL_PERIPH_GPION, \b SYSCTL_PERIPH_GPIOP, \b SYSCTL_PERIPH_GPIOQ,

//! \b SYSCTL_PERIPH_HIBERNATE, \b SYSCTL_PERIPH_I2C0, \b SYSCTL_PERIPH_I2C1,

//! \b SYSCTL_PERIPH_I2C2, \b SYSCTL_PERIPH_I2C3, \b SYSCTL_PERIPH_I2C4,

//! \b SYSCTL_PERIPH_I2C5, \b SYSCTL_PERIPH_PWM0, \b SYSCTL_PERIPH_PWM1,

//! \b SYSCTL_PERIPH_QEI0, \b SYSCTL_PERIPH_QEI1, \b SYSCTL_PERIPH_SSI0,

//! \b SYSCTL_PERIPH_SSI1, \b SYSCTL_PERIPH_SSI2, \b SYSCTL_PERIPH_SSI3,

//! \b SYSCTL_PERIPH_TIMER0, \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2,

//! \b SYSCTL_PERIPH_TIMER3, \b SYSCTL_PERIPH_TIMER4, \b SYSCTL_PERIPH_TIMER5,

//! \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1, \b SYSCTL_PERIPH_UART2,

//! \b SYSCTL_PERIPH_UART3, \b SYSCTL_PERIPH_UART4, \b SYSCTL_PERIPH_UART5,

//! \b SYSCTL_PERIPH_UART6, \b SYSCTL_PERIPH_UART7, \b SYSCTL_PERIPH_UDMA,

//! \b SYSCTL_PERIPH_USB0, \b SYSCTL_PERIPH_WDOG0, \b SYSCTL_PERIPH_WDOG1,

//! \b SYSCTL_PERIPH_WTIMER0, \b SYSCTL_PERIPH_WTIMER1,

//! \b SYSCTL_PERIPH_WTIMER2, \b SYSCTL_PERIPH_WTIMER3,

//! \b SYSCTL_PERIPH_WTIMER4, or \b SYSCTL_PERIPH_WTIMER5.

//!

//! \note The ability to power off a peripheral varies based on the Tiva

//! part in use. Please consult the data sheet for the part you are using to

//! determine if this feature is available.

//!

//! \return None.

//

//*****************************************************************************

void

SysCtlPeripheralPowerOff(uint32_t ui32Peripheral)

{

Hello Scott,

Thanks for the register dump. The issue could not be isolated because of the following

1. RCC register offset is 0x060 and not 0x050 so a new dump would be needed

2. The DSLPPWRCFG offset is 0x18C, LDODPCTL offset is 0x1BC. It is there in the data sheet, so you may have to check which version of the data sheet you are using. I have the November-2013 version.

3. The DCGC registers and DSLPCLKCFG register look all OK.

Driving them low should be OK. If in deep sleep the only method to come back in Run State is to reset the device, my suggestion would be to put all IO's in input state with pull downs enabled.

Regards

Amit Ashara

Hi Scott,

Clock to a peripheral id disabled by the API SysCtlPeripheralDisable

All the API's are documented in the TIVAWare Peripheral Driver User Guide.

Regards

Amit Ashara

Hi Scott,

I made a small code to run the following example

SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_XTAL_16MHZ |
                   SYSCTL_OSC_INT);

SysCtlPeripheralClockGating(1);
    SysCtlDeepSleepClockSet(SYSCTL_DSLP_DIV_1|SYSCTL_DSLP_OSC_INT30|SYSCTL_DSLP_PIOSC_PD);

SysCtlLDODeepSleepSet(SYSCTL_LDO_0_90V);

SysCtlDeepSleepPowerSet(SYSCTL_FLASH_LOW_POWER | SYSCTL_SRAM_LOW_POWER);

SysCtlDeepSleep();

and measured the current.to be ~0.5mA. This is less than 1.0mA as shown in the data sheet as the LDO voltage has been scaled to 0.9V instead of the operational 1.2V

Regards

Amit Ashara

Amit,

see attachment for new code and register dump.

// 20140213sm CODE FOR SHUT DOWN

			if (_Device_Control.dwEvent & (EVENT_SHUT_DOWN_WAKEUP | EVENT_SHUT_DOWN))
			{
				if (_Device_Control.ucCountDownToShutDown == 0)
				{
					WriteString(_Device_Control.ucASCIIPortIO, (UCHAR *) pCRLF);
					WriteString(_Device_Control.ucASCIIPortIO, (UCHAR *) pSHUT_DOWN);
					WriteString(_Device_Control.ucASCIIPortIO, (UCHAR *) pCRLF);

					//====================
					// IO pins
					LEDsOFF();
					TURN_TONE_OFF();
					// TxRx - should already be in power down state
					bTemp = RSC_FALSE;
					bTemp = TxRx_PowerDown();
					SysCtlDelay(1000000);
					//SSI1_DRIVE_FSS_INACTIVE;
					//CC1120_DEASSERT_CS;

					if (_Device_Control.dwEvent & EVENT_SHUT_DOWN_WAKEUP)
					{
						_Device_Control.dwEvent = 0;
						// shut down, leave only motion interrupt enabled

					}
					else	// _Device_Control.dwEvent == EVENT_SHUT_DOWN
					{
						_Device_Control.dwEvent = 0;

						//********************************
						// Configuration for SHUT DOWN
						//********************************

						//====================
						// LDO voltage in DEEP SLEEP
						// 0.9V results in lower current draw
					    	SysCtlLDODeepSleepSet(SYSCTL_LDO_0_90V);
					    	//SysCtlLDODeepSleepSet(SYSCTL_LDO_1_20V);
						//====================

						//====================
						// SRAM and FLASH modes in DEEP SLEEP
						//
					    	// NOTE:  MAKES NO DIFFERENCE WHICH CALL IS MADE
						//
					    	//SysCtlDeepSleepPowerSet(SYSCTL_LDO_SLEEP | SYSCTL_TEMP_LOW_POWER | SYSCTL_FLASH_LOW_POWER | SYSCTL_SRAM_LOW_POWER);
					    	SysCtlDeepSleepPowerSet(SYSCTL_FLASH_LOW_POWER | SYSCTL_SRAM_LOW_POWER);
						//====================

						//====================
						// clock in DEEP SLEEP
					    	SysCtlDeepSleepClockSet(SYSCTL_DSLP_DIV_1 | SYSCTL_DSLP_OSC_INT30 | SYSCTL_DSLP_PIOSC_PD);
						//====================

						//====================
						// Peripherals
						// SysCtlPeripheralClockGating(1);
					    	// SysCtlPeripheralDeepSleepDisable() for all project peripherals
						// SysCtlPeripheralDisable() for all project peripherals
					    	Proj_Peripheral_Config_ShutDown();
						//====================

					    	// SHUT DOWN mode, only a hardware reset can restore operation
						//
					    	// NOTE:  20140213sm: on a target board NOT connected to any UART or ICD, the SHUT DOWN current = 2.2mA
						//
						while (1)
						{
							SysCtlDeepSleep();
							SysCtlDelay(1);
						}
					}

// 20140213sm Proj_Peripheral_Config_ShutDown() function call

//============================================================
// Description:
//
// SHUT DOWN configuration for all project peripherals.
//============================================================
void Proj_Peripheral_Config_ShutDown(void)
{

	//============================================================
    	// project peripherals without a #define for a call to
	// SysCtlPeripheralDeepSleepDisable().
	
	ROM_SysTickIntDisable();
	ROM_SysTickDisable();
    	ROM_FPUDisable();

	SysCtlPeripheralClockGating(RSC_TRUE);

	//============================================================
    	// all project peripherals are disabled during SHUT DOWN
	
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_WDOG0);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_TIMER1);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_TIMER2);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_SSI1);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_ADC0);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_UART0);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_UART2);

	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_GPIOA);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_GPIOB);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_GPIOC);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_GPIOD);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_GPIOE);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_GPIOF);
	SysCtlPeripheralDeepSleepDisable(SYSCTL_PERIPH_GPIOG);

	//============================================================
    	// NOTE: DOES anything need to be done for NON project peripherals?
}

// ISSUEING SHUTDOWN COMMAND

	[C],VERSION,2nd Gen GPSC MOBILE V0.069 02-13-2014,(c)RSC.
	MOBILE> ,1388,0.069,16000000,0,32,64,96,128,160,192,224,0x00000000
	MOBILE>
	[N],StopNav,0

	MOBILE>
	MOBILE> SHUTDOWN
	[C],SHUTDOWN

	[N],StopNav,1

	SHUTDOWN


// breakpoint set in SysCtlDeepSleep() at CPUwfi();
// Current draw, connected to ICD == 8.37mA
// NOTE:  20140213sm: on a target board NOT connected to any UART or ICD, the SHUT DOWN current = 2.2mA


//Register Dump in  SysCtlDeepSleep()

RCC (0x400FE060)			0x0F8E3811
DSLPCLKCFG (0x400FE144)		0x00000032
DSPLPWRCFG (0x400FE18C)		0x00000023
LDODPCTL (0x400FE1BC)		0x80000012

SYSCTL registers from offset 0x800 to 0x85C
#define SYSCTL_DCGCWD           0x400FE800  // Watchdog Timer Deep-Sleep Mode

ADDRESS		DATA
0x400FE800	00000000	00000000	00000000	00000000	00000000	00000001	00000000	00000000

0x400FE820	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000

0x400FE840	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000

0x400FE860	00000000	00000000	00000000	00000000	00000000	00000000	00000000	00000000

// NOTE: DOES anything need to be done for NON project peripherals?

// breakpoint set in SysCtlDeepSleep() at CPUwfi();
// Current draw, connected to ICD == 8.37mA
// NOTE:  20140213sm: on a target board NOT connected to any UART or ICD, the SHUT DOWN current = 2.2mA

//Register Dump in  SysCtlDeepSleep()

RCC (0x400FE060)   0x0F8E3811
DSLPCLKCFG (0x400FE144)  0x00000032
DSPLPWRCFG (0x400FE18C)  0x00000023
LDODPCTL (0x400FE1BC)  0x80000012

Hello Scott,

The settings look fine. When no ICDI or UART is connected the Shut Down current is 2.2mA as you mentioned. Is the VDDC Pin on the part at 0.9V?

Regards

Amit Ashara

Yes the VDDC pin is at 0.9V.

Hello Scott,

Did you try the code I had sent to you earlier. This will help make sure that there is no other component on your DK/EK-TM4C board that is consuming the current.

Regards

Amit Ashara

7776.20140214sm Response to Amits code example.docx

Attached is the only code sample that I have received from you.

Hello Scott,

I am using the internal oscillator but not disabling the XTAL Pads. If you could run the small code in a separate test and let me know the current it would be useful as it takes out any SW component

Secondly which board are you using. I am not sure of that either

Regards

Amit

Hello Scott,

Any update on the same for me to follow up, or is it resolved?

Regards

Amit

Note: no change in current when NOT using SYSCTL_MAIN_OSC_DIS in ROM_SysCtlClockSet().

See attached schematic (RSC and TI are under mutual non-disclosure so please do not share). I believe I can account for 2.3 mA current draw (see page 3, TCXO current draw). I consider the issue resolved at this point. Thank you for your help.