DMA Transfers to CRC Module in 64-bit Mode Timing Measurement

Glad you were able to resolve this.

Happy coding.

Yeah, there has been a subtle "improvement" in the latest Hercules MCU TMS570LS3137, in which when an INT is generated, the VIM defaults to bypass the address 0x18 and go directly in the designated ISR. With the previous TMS570LS20216, the call to ISR is routed to address 0x18 then to the ISR.

Therefore, my ISR was called once then got lost for good (never come back for the next INT).

Regards.

Chuck,

Ok.  The Cortex R4 does have a significant improvement in that you can vector directly to your ISR through the VIC port instead of routing all interrupts through 0x18 and having to dispatch from there.   If you think about this in the context of a very fast processor - one that runs faster than the flash memory system it especially makes sense since not only does the extra step at 0x18 take cycles but it's also another discontinuity in the instruction fetch sequence which introduces it's own penalty.

But to be clear, you have control of whether or not to turn this feature on.  So if you don't like it you can disable it.  And that also applies for the TMS570LS20216.  The control is through the CPU's System Control Register in the System Control Coprocessor;   the bit name is "VE" and it defaults to '0' meaning IRQs vector to 0x18.  So the init code is actually changing this to a '1' to make use of the VIC.  

Through HalCoGen you can control how this bit is initialized here:

If you run into anything else like this please keep posting your quesitons.... In this case I wouldn't say the feature is subtle but it's more like an important feature in a sea of hundreds of other important features;  hence the need for HalCoGen.

Hey Anthony,

I read the TRM and also have found that VE=0 is default, however if you look at the following screen capture of the IAR workbench, The CP15 SCTLR.VE bit is '1' before __iar_program_start is executed, so somewhere there must be an undocumented feature being executed.

I'll ask IAR to explain on what has actually happened.

Thanks again!

For some reasons the reset of the MCU was not completely performed on my previous screen capture, the last state of VE was retained.

After re-downloading the code, VE=0 by default. This VE bit has been set to '1' by IAR startup code later during initialization.

So this is solved.

Thanks.