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ECC and RAM permanent corruption

Etienne Alepins
Intellectual 775 points


Hi,

On Hercules TMS570LS MCUs, when the ECC is computed during a write to the RAM, on which data is based the ECC computation?

a) On the data the processor wanted to write?
or
b) On the data effectively written in RAM?

This is not the same in the event of a RAM corruption (e.g. bit stuck to 0). I mean a bit stuck even before the write happens.

For that corrupted memory location, when that data will be read:

a) in this case, the ECC mechanism will flag a corrupted data
b) in this case, the ECC mechanism will not flag anything since the ECC code will be computed on the corrupted data.

In which way the processors are implemented: a) or b)?

Thanks.

  • 0
    TI__Mastermind 23000 points

    Hello Etienne,

    I would say that the implementation most closely matches your "a" condition.

    ECC for tightly coupled SRAM is computed inside the lockstep CPUs and then transmitted to the SRAM for storage along with the data.  The ECC value is evaluated upon a readback.

    If you were to encounter a fault during write, one of two things might happen.  If the fault occurs in the CPU logic before the write goes onto the bus or the fault occurs in ECC generation logic, then the fault will be detected by the lockstep diagnostic.  If the fault occurs in the interconnect to SRAM or in the SRAM itself, the fault should be detectable upon readback of the value from SRAM.

    Best Regards,

    Karl