I am trying to implement UART Transmit Interrupt in FIFO mode at 1/8 level.
My understanding is since level is set at 1/8, it means at every (1/8)x16bytes = 2 bytes, interrupt is generated.
My code for above is given below:
static uint8_t FIFOCount;
//UART Handler ----------------------
void UARTIntHandler(void)
{
uint32_t ui32Status;
//
// Get the interrrupt status.
//
ui32Status = UARTIntStatus(UART0_BASE, true);
//
// Clear the asserted interrupts.
//
UARTIntClear(UART0_BASE, ui32Status);
if(ui32Status & UART_INT_TX) {
FIFOCount++; //Add
}
}
//End of UART Handler -------------------------
//--------------------------------------------
// Send a string to the UART.
void UARTSend(const uint8_t *pui8Buffer, uint32_t ui32Count)
{
//
// Loop while there are more characters to send.
//
while(ui32Count--)
{
//
// Write the next character to the UART.
//
// if(UARTCharPutNonBlocking(UART0_BASE, *pui8Buffer++));
// else {
// //clear Tx FIFO
// UARTDisable(UART0_BASE);
// UARTEnable(UART0_BASE);
// UARTCharPutNonBlocking(UART0_BASE, *pui8Buffer++);
//
// }
UARTCharPut(UART0_BASE, *pui8Buffer++);
}
}
//*****************************************************************************
int
main(void)
{
unsigned char TxBuffer[80] = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ-!@#$0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ-!"; //80
ROM_FPULazyStackingEnable();
// Set the clocking to run directly from the crystal.
ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ);
// Enable the peripherals used by this example.
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
// Enable processor interrupts.
ROM_IntMasterEnable();
// Set GPIO A0 and A1 as UART pins.
ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
// Configure the UART for 115,200, 8-N-1 operation.
ROM_UARTConfigSetExpClk(UART0_BASE, ROM_SysCtlClockGet(), 115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
// Enable the UART interrupt.
//
UARTDisable(UART0_BASE);
UARTFIFODisable(UART0_BASE);
ROM_IntEnable(INT_UART0);
UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX1_8, UART_FIFO_RX1_8); //Add
UARTTxIntModeSet(UART0_BASE, UART_TXINT_MODE_FIFO);
UARTIntEnable(UART0_BASE, UART_INT_TX | UART_INT_RX); //Add
UARTEnable(UART0_BASE);
UARTFIFOEnable(UART0_BASE); //Add
UARTSend((uint8_t *)TxBuffer, 70);
UARTSend((uint8_t *)FIFOCount, 1);
while(1);
}
/**************************************************************************************************/
/************ END OF CODE **********************/
The issue is I am not getting interrupt after the desired 2 bytes in FIFO.
The FIFOCount is 4 incase I transmit 80 chars and 2 in case if I transmit 35 characters.
I am not sure where I am going wrong. Help needed seriously.
-blueshift