Hello.
My question is regarding the device TMS570LS3137, module "High-End Timer Transfer Unit (HTU) Module".
In spnu499b.pdf, page 915, Table 21-11, Description of bit field GC.HTURES is stated
"The recommended order of operations is:",
and as second point is stated
"Wait for the HTURES bit to clear."
Since I'm working for a safety relevant project, I can not just use the following code:
// 1. Set the software reset bit. This also clears HTUEN:
GC.HTURES = 1;
// 2. Wait for the HTURES bit to clear:
while (0 != GC.HTURES)
{
// do nothing except waiting
}
// 3. Configure the HTU registers and packets.
...
Reason why this code is no option: In case the GC.HTURES bit field has a stuck-at-1-error, the above while-loop would mutate to an ENDLESS loop. And possible endless loops are NO option in the safety-relevant project. So I have to implement the code with a timeout check, like in the following way:
// 1. Set the software reset bit. This also clears HTUEN:
GC.HTURES = 1;
// 2. Wait for the HTURES bit to clear:
volatile uint32 start = 10000;
while (start > 0)
{
start--;
}
if (0 != GC.HTURES)
{
// ERROR!!!
}
else
{
// NO error.
// 3. Configure the HTU registers and packets.
...
}
My problem is now: I can not find an information about the WORST CASE time duration how long it would take between the following two events:
* Event 1: Setting GC.HTURES to 1.
* Event 2: GC.HTURES will be cleared to 0.
So I would ask you to provide me this WORST CASE time duration. If this WORST CASE time duration depends on several factors (e.g. configuration of other HTU registers), I would ask you to provide me an appropriate formula.
Thank you and regards
Oliver.
