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TMS570 interrupt

enrico terraneo
Intellectual 695 points

Hi,

In my application I use ADC CAN and GIO interrupts.

In some case I should disable IRQ interrupts through CPSR for 500 us about and afterwards re-enable them.

If, when the IRQ interrupts are disabled, one or more interrupts occur i.e.CAN or/and GIO; will they be generated when the IRQ interrupts are re-enabled?

Thanks

  • 0
    TI__Mastermind 22375 points

    Enrico,

    While CPU is IRQ disable, the VIM module will continue to receive interrupt from all peripheral modules, assuming the in the VIM, the REQMASK is correctly configured.

    So yes, all interrupts will be registered by WIM and as soon as the CPU is IRQ enable, it will start servicing any pending interrupts in order. (high priority first)