I am considering using the EPI in GP mode to connect to an FPGA.
Table 11-2 in the TM4C129XNCZAD data sheet (page 853) states that the interface can run at 60 MHz max in this mode. This matches the clock period spec of 16.67 ns on page 2133. Page 847 of the data sheet states that the max data rate is 150 MB/second. If I use a 32-bit data width this gives me a rate of 60 MHz x 4 bytes of 240 MB/sec. If I assume that a read takes two clock cycles then I get 120 MB/sec.
Where does the 150 MB/sec rating come from?
Thanks,
Jeff
