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TMS570 PLL2 reaction/ failure forwarding to the ESM module

Henry Abril1
Intellectual 485 points

Hi,

According to the TRM SPNU499B–November 2012–Revised August 2013, the PLL1 error reaction is configurable via the PLL Control Register 1 (PLLCTL1).

- Error forwarding to the ESM / bypass to oscillator

- Reset

As far as I understand the PLLCTL1 configuration affects only the PLL1, Is this correct?

Is the PLL2 error reaction also configurable? Is the PLL2 error notification hardwired to the ESM module in case of failure detection?

Thank you,

Henry

 

  • 0
    TI__Guru 59540 points

    Hello Henry,

    You are correct in that PLLCTL1 is only applicable to PLL1 which is used for the system clocks (GCLK,HCLK).

    Within this control register you may configure the device to reset on slip or reset on oscillator failure. This, however, does not preclude the ESM error notification. i.e., when you come through reset, these error conditions will still be flagged in the ESM since the ESM status registers are "sticky" meaning they are not cleared by a soft reset as would be done with an ROS or ROF. In the case of a PLL slip, you would see Group1 Channel 10 ESM flag being set and for an OSC fail, it would be the Clock Monitor bit located in Group 1 channel 11.

    For PLL2, there is also an ESM error flag for PLL2 Slip which is located in Group1 channel 42.

    In both cases, there is an internal connection between the PLL and the ESM.

  • 0 in reply to Chuck Davenport
    Intellectual 485 points

    Hi,

    Could you please help me to clarify the last item of my previous message?

    "Is the PLL2 error notification hardwired to the ESM module in case of failure detection?"

    So, that the forwarding of the PLL2 error is not configurable and I do NOT have to enable/modify any flags/bits to forward the PLL2 error to the ESM module....

    Thank you,

    Henry

     

  • 0 in reply to Henry Abril1
    TI__Guru 59540 points

    Hi Henry,

    In both cases for PLL1 and PLL2 the ESM error notifications cannot be turned off meaning that there will always be a signal to the ESM. However, these are Group1 errors so the error notification can be configured to produce an interrupt or simply set the flag in the ESM.

     

  • 0 in reply to Chuck Davenport
    Intellectual 485 points

    Hi Chuck,

    I do not agree with you regarding the hardwired forwarding of the PLL1 error, as far as I understood in the TRM, the user can configure the PLL1 to bypass and forward or NOT the error to the ESM module by modifying the BPOS bits of the PLLCTL1 register.

    Please take a look to the following section of the TRM: 

    ----------------------------------------------------------------------------------------------------------

    10.5.3 Behavior on PLL Fail
    ...
    The PLL may enable/disable the automatic switch over as well as the error signaling; if the error signaling
    is enabled, a PLL slip may be configured to generate a reset. The automatic switch-over and suppression
    of the error signals are controlled by the bypass on slip bit field -- BPOS[1:0] (PLLCTL1.(30:29)). When
    BPOS[1:0] is disabled (BPOS[1:0] = 10b):
    • automatic response to the PLL slip is prevented
    • ESM/exception is NOT generated
    • reset on slip is not generated regardless of the state of the ROS bit
    • status bits are set on a PLL slip independent of BPOS[1:0]
    When BPOS[1:0] is enabled (BPOS[1:0] = 00b OR 01b OR 11b):
    • PLL slip causes the clock source into GCM clock source 1 to shift from the PLL to the oscillator
    • ESM/exception is generated
    • reset on slip is generated if ROS is set

    ----------------------------------------------------------------------------------------------------------

    1. Could you please let me know your opinion about my interpretation of the section above?

    2. As I did not find any similar information in the TRM related to the PLL2, I decided to confirm with you if  the forwarding to the ESM module of the PLL2 slip error is configurable or not.  According to your feedback this option is not configurable and the PLL2 will always report the error to the ESM module.

    Thank you,

    Henry

     

  • 0 in reply to Henry Abril1
    TI__Guru 59540 points

    Hello Henry,

    Your understanding/interpretation of PLL1 slip error notifications and bypass on slip is correct. My assumptions I presented were based on a different use case and not properly reflecting the description in the TRM.

    In regard to PLL2, again, your assumption is correct. There is no mechanism to disable the PLL slip error reporting to the ESM. Also note that the status flags in FBSLIP and RFSLIP status information does not apply to PLL2.