Read timer0a value

Stefano De Blasiis

I work with TM4c123AH and CCS 5.5.

I have a 16 bit timer configured :

    // TimerConfigure TIMER 0
    TIMER0_CFG_R = 0x00000004;
    TIMER0_TAMR_R = 0x00000002;
    TIMER0_TBMR_R = 0x00000002;

    TimerLoadSet(TIMER0_BASE, TIMER_A, 2000);

Some time I have to read the value reached by timer (from 0 to 2000).

I read the TIMER0_TAV_R register, but it have a streng and random value also stepping with emulator

Probably something wrong, what should I do to read the value reached by the timer?

Thanks

Stefano

over 11 years ago

0 Amit Ashara over 11 years ago

TI__Guru**** 244400 points

Hello Stefano,

The TAV register in 16 bit mode has the free running value in 15:0 bits and prescaler free running value in 23:16. So if you are not using the prescaler then ignore the bits 23:16 and read only the 15:0 bit by masking the read contents with 0xFFFF.

When you read the register what is the value you get?

Regards

Amit

0 Stefano De Blasiis over 11 years ago in reply to Amit Ashara

Intellectual 530 points

I don't have pre-scaler, then I read only the 15:0 bits

When I read the TAV register bit 15:0, the value is random and also greater than 2000.

I want the elapsed time between the start timer and my check.

When with CCS5.5 advancing step by step the TAV register have a random value; I was expecting the value to be altered of 1.

My final question is: where the value 2000 is loaded and decremented ? I need to check it .

Thanks

0 Amit Ashara over 11 years ago in reply to Stefano De Blasiis

TI__Guru**** 244400 points

Hello Stefano,

In Count Down mode it from the value loaded in GPTMTAILR register and then counted down to 0x0. hence the value more than 2000 does not make sense.

Secondly, the STALL bit is not set. Hence when the CPU is stalled by the debugger, the timer will continue to count.

Regards

Amit

0 Stefano De Blasiis over 11 years ago in reply to Amit Ashara

Intellectual 530 points

Where is the STALL bit ?

0 Amit Ashara over 11 years ago in reply to Stefano De Blasiis

TI__Guru**** 244400 points

Hello Stefano

The STALL bit is in GPTMCTL register. Bit-1 for Timer A Stall. Please note that when a step debug is set the time it takes for the CPU to remove halt and set halt may cause the timer to step multiple times

I am looking into why you are seeing a value more than 2000 in TAV register.

Regards

Amit

0 Stefano De Blasiis over 11 years ago in reply to Amit Ashara

Intellectual 530 points

I tried again and I do not see value greater than 2000 probably reading the wrong line in the debug window.

Now try with STALL bit enabled

0 Amit Ashara over 11 years ago in reply to Stefano De Blasiis

TI__Guru**** 244400 points

Hello Stefano

I just completed my test code as well (found it to be working as expected) and saw your post. Good work!!!

As mentioned STALL shows the behavior as expected earlier,

Regards

Amit

0 user4009506 over 10 years ago in reply to Amit Ashara

Prodigy 20 points

Hello,

I have the same problem when I configure de GPTMCTL register...

TIMER0_CTL_R |= TIMER_CTL_TAEVENT_POS|TIMER_CTL_TASTALL;

STALL bit is enabled and the TIMER0_TAV_R keeps creating random values...

0 Amit Ashara over 10 years ago in reply to user4009506

TI__Guru**** 244400 points

Hello user4009506,

The Stall bit would be in effect when the CPU is halted as well.

Regards
Amit

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Read timer0a value