This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

GPIO Problem on F28M35H52C1 Cortex M3 (Rev B)

Hello,

We are currently using the F28M35H52C1 Rev B.  We had used Rev X until this problem started showing up.

I have built a small test program for the M3 (attached).  The program simply sets up GPIO Port J pins 6 & 7 as outputs, and toggles them in a while loop.  The issue I'm currently seeing is that if one of these pins is low and I pull the other high, it briefly pulls them both high.   I am using a logic analyzer to watch the output on the GPIOs.

Test cases: 

PJ6 Low, Pull PJ7 High.   Result:  PJ6 high for a few microseconds then returns low.

PJ7 Low, Pull PJ6 High.   Result :  PJ7 high for a few microseconds then returns low.

I've verified with a continuity meter that there is no external short between these two pins.

Any direction or insight is greatly appreciated.

Thanks!

Tom

#include <stdlib.h>
#include <stdbool.h>
#include <stdio.h>
#include "inc/hw_ints.h"
#include "inc/hw_memmap.h"
#include "inc/hw_nvic.h"
#include "inc/hw_gpio.h"
#include "inc/hw_types.h"
#include "inc/hw_sysctl.h"
#include "driverlib/debug.h"
#include "driverlib/interrupt.h"
#include "driverlib/sysctl.h"
#include "driverlib/gpio.h"
#include "module.h"
#include "M3util.h"

int main(void) {
    // Disable Protection
    HWREG(SYSCTL_MWRALLOW) =  0xA5A5A5A5;

    // Sets up PLL, M3 running at 100MHz and C28 running at 100MHz
    SysCtlClockConfigSet(SYSCTL_USE_PLL | (SYSCTL_SPLLIMULT_M & 0xA) |
                         SYSCTL_SYSDIV_1 | SYSCTL_M3SSDIV_1 |
                         SYSCTL_XCLKDIV_4);

    // Enable clock supply for GPIOC
//    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);

    // Disable clock supply for the watchdog modules
    SysCtlPeripheralDisable(SYSCTL_PERIPH_WDOG1);
    SysCtlPeripheralDisable(SYSCTL_PERIPH_WDOG0);

    // Setup hardware UART pins.
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
	GPIOPinUnlock(GPIO_PORTJ_BASE, GPIO_PIN_7 | GPIO_PIN_6);
    GPIOPinTypeGPIOOutput(GPIO_PORTJ_BASE, GPIO_PIN_7 | GPIO_PIN_6);

    // Enable processor interrupts.
    IntMasterEnable();

    int state = 0;
    while(1){
        GPIOPinWrite(GPIO_PORTJ_BASE, GPIO_PIN_7, state);
        delay(100);
        GPIOPinWrite(GPIO_PORTJ_BASE, GPIO_PIN_6, ~state);
        delay(100);
        state ^= 0xffff;
    }
}