With the TM4C123 part can you have two DMA channels pushing data into to SSI peripherals at the same time? In reading the data sheet:
When a μDMA channel requests a transfer, the μDMA controller arbitrates among all the channels
making a request and services the μDMA channel with the highest priority. Once a transfer begins,
it continues for a selectable number of transfers before rearbitrating among the requesting channels
again. The arbitration size can be configured for each channel, ranging from 1 to 1024 item transfers.
After the μDMA controller transfers the number of items specified by the arbitration size, it then
checks among all the channels making a request and services the channel with the highest priority.
If a lower priority μDMA channel uses a large arbitration size, the latency for higher priority channels
is increased because the μDMA controller completes the lower priority burst before checking for
higher priority requests. Therefore, lower priority channels should not use a large arbitration size
for best response on high priority channels.
I'm having trouble figuring out whether triggering a dma channel blocks because it can't "arbitrate" another trigger or because there is a channel running. For example, If I have two 512 byte buffers and use a channel to push one into an SSI port and set the arbitration size to 4 and then trigger the other (seperate) DMA channel to push the other buffer. Will the DMA controller pick up the other request and kick off the second channel allowing both channels to push data out of both SSI ports at the same time?
Basically, can you run multiple DMA channels at the same time? Is this based on whether they can get triggered and not that it is a "one channel at a time" thing?
Sorry if this is a dumb question, but I couldn't find a clear answer on the forums.
Thanks,
Rob