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Tiva C series 129ENCPDT Initialisation FaultISR --rom_model

Barry Andrews
Genius 3460 points
Other Parts Discussed in Thread: TM4C129ENCPDT

I am using the TM4C129ENCPDT processsor and started a new project in order to do my own bootloader which uses a proprietry protocol.  In the process of doing this I created a new project using TivaWare_C_Series-2.0.1.11577a.

When I ran under the Stellaris ICDI it went straight to the FaultISR.

I tried changing Stack and such but no matter what I did it just kept on going to the ISR.

Eventually I decided to go through all the settings step by step to see if I could determine why the error was occurring. In the end I found that changing the "Link using ROM autoinitialisation model (--rom_model, -c)" to "Link using RAM autoinitialisation model (--ram_model, -cr)"

What is the difference between these two models?

Why does my other project which uses TIRTOS work fine with the ROM autoinitialisation but this consistently fails?

Is there an error in the ROM Code of this processor?

Tiva processor markings are:

XM4C129

ENCPDTI1

3AC0E3W

G4

  • 0
    TI__Guru**** 244400 points

    Hello Barry

    The --rom_model and --ram_model define how the CPU will intialize the variables in cinit call i.e will it be load time or run time initialization. It has got nothing to do with the ROM Code of the Processor.

    When you get the Fault can you check what type of Fault it is by reading the registers 0xE000ED28 and 0xE000ED38

    Regards

    Amit

  • 0 in reply to Amit Ashara
    Genius 3460 points

    Thanks for the clarification, immediately after exception (breakpoint at FaultISR) values read using Memory Browser are:

    0xE000ED28 = 0x00000400

    0xE000ED2C = 0x40000000

    0xE000ED30 = 0x0000000A

    0xE000ED34 =0x E000EDF8

    0xE000ED38 =0x E000EDF8

  • 0 in reply to Barry Andrews
    Genius 3460 points

    NVIC registers show -

    Imprecise Data Bus Error in NVIC_FAULT_STAT

    Forced Hard Fault in NVIC_HFAULT_STAT

    0xE000EDF8 in NVIC_MM_ADDR and also NVIC_FAULT_ADDR

  • 0 in reply to Barry Andrews
    TI__Guru**** 244400 points

    Hello Barry

    This means that the Data Bus of the CPU read a value from an unmapped location. This could typically be the case when Data read before was used to compute an address for the next data fetch that caused the Bus Fault. And would arise since the variables are not auto-initialized.

    Regards

    Amit

  • 0 in reply to Amit Ashara
    Genius 3460 points

    Thanks Amit

    I understand this.  But why is this happening in the initialisation code.

    It has yet to reach any of my code, so this is just the standard C lib initialise function being called.

    I have no control over this and it should be able to determine if items do or don't need to be initialised, or are there some settings somewhere that control this?  I would have thought this was all automatically determined by the linker and as such something I don't need to advise it to do.

    Regards

    Barry Andrews

  • 0 in reply to Barry Andrews
    TI__Guru**** 244400 points

    Hello Barry

    This is an internal method to CCS on how it handles the variable initialization. I am not an expert on CCS and would request you to post the question regarding the effect of --ram_model and --rom_model to the CCS forum on E2E. They would be able to explain the internals better.

    Regards

    Amit