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MINITGCR based DCAN RAM Initialization sequence



Hello Support,

Using MINITGCR based initialization for DCAN RAM area, do I have to SET DCANCTL Register INIT Bit as HIGH or LOW.
Or, it doesn't matter in any way.
In essence does DCAN Peripheral registers need to be in any special way [except may be PMD field of DCANCTL Register] before MINITGCR based DCAN RAM initialization is triggered?
Any help will be be useful.
Thank you.
Regards
Pashan

  • Hello Pashan,

    No special configuration of the DCAN module is required to initialize the DCAN RAM using the system module auto-initialization mechanism.

    You do need to enable the parity checking mechanism inside the relevant DCANx module if you also want the associated parity memory to be initialized.

    In general though, it is recommended to ensure that the INIT bit is set in the DCAN CTL register to avoid the DCAN message handler also writing to the DCAN RAM at the same time.

    -Sunil