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example_spi_Master_slave not working

Andrew Hartnett
Intellectual 890 points

Other Parts Discussed in Thread: HALCOGEN, RM48L950

Hello,

I am trying to get the "example_spi_Master_Slave" example to work (from the "HALCoGen\v03.08.01\examples\RM48x" folder). I have ensured that I have:

CLK (J9 pin 6)  to CLK (J10 pin 64)

SIMO (J9 pin 11) to SIMO (J10 pin 61)

SOMI (J9 pin 12) to SOMI (actually labelled as SIMI on my revision of the HDK, but J10 pin 59)

and CS0 (J9 pin 8) to CS (J10 pin 63)

I've checked my HalCoGen settings:

and below is my slightly modified code from the example (mostly just to control when it sends a packet and print out what was received. 

#include "sys_common.h"

/* USER CODE BEGIN (1) */
#include "spi.h"
#include "sci.h"
#include "ti_printf.h"
/* USER CODE END */

/** @fn void main(void)
*   @brief Application main function
*   @note This function is empty by default.
*
*   This function is called after startup.
*   The user can use this function to implement the application.
*/

/* USER CODE BEGIN (2) */
uint16 TX_Data_Master[16] = { 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10 };
uint16 TX_Data_Slave[16]  = { 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20 };
uint16 RX_Data_Master[16] = { 0 };
uint16 RX_Data_Slave[16]  = { 0 };
/* USER CODE END */

void main(void)
{
/* USER CODE BEGIN (3) */
	char command1[2];
	int i;

	spiDAT1_t dataconfig1_t;

	dataconfig1_t.CS_HOLD = FALSE;
	dataconfig1_t.WDEL    = TRUE;
	dataconfig1_t.DFSEL   = SPI_FMT_0;
	dataconfig1_t.CSNR    = 0xFC;


	/* Enable CPU Interrupt through CPSR */
	_enable_IRQ();

	/* Initialize SPI Module Based on GUI configuration
	 * SPI1 - Master ( SIMO, SOMI, CLK, CS0 )
	 * SPI2 - Slave  ( SIMO, SOMI, CLK, CS0 )
	 * */
	spiInit();
	sciInit();


	while(1)
	{
		ti_printf("waiting user input\r\n");

		sciReceive(scilinREG,1, (unsigned char *)&command1[0]);
		sciSend(scilinREG,1,(unsigned char *)&command1[0]);

		/* Initiate SPI2 Transmit and Receive through Interrupt Mode */
		spiSendAndGetData(spiREG2, &dataconfig1_t, 16, TX_Data_Slave, RX_Data_Slave);

		/* Initiate SPI1 Transmit and Receive through Polling Mode*/
		spiTransmitAndReceiveData(spiREG1, &dataconfig1_t, 16, TX_Data_Master, RX_Data_Master);
		for(i=0;i<=16;i++)
		{
			ti_printf("%d TX_Data_Slave: 0x%04x RX_Data_Slave: 0x%04x TX_Data_Master: 0x%04x RX_Data_Master: 0x%04x\r\n",i, TX_Data_Slave[i], RX_Data_Slave[i], TX_Data_Master[i], RX_Data_Master[i]);
		}
	}
/* USER CODE END */
}

However what I see as a result is:

waiting user input
0 TX_Data_Slave: 0x0011 RX_Data_Slave: 0x0000 TX_Data_Master: 0x0001 RX_Data_Master: 0xFFFF
1 TX_Data_Slave: 0x0012 RX_Data_Slave: 0x0000 TX_Data_Master: 0x0002 RX_Data_Master: 0xFFFF
2 TX_Data_Slave: 0x0013 RX_Data_Slave: 0x0000 TX_Data_Master: 0x0003 RX_Data_Master: 0xFFFF
3 TX_Data_Slave: 0x0014 RX_Data_Slave: 0x0000 TX_Data_Master: 0x0004 RX_Data_Master: 0xFFFF
4 TX_Data_Slave: 0x0015 RX_Data_Slave: 0x0000 TX_Data_Master: 0x0005 RX_Data_Master: 0xFFFF
5 TX_Data_Slave: 0x0016 RX_Data_Slave: 0x0000 TX_Data_Master: 0x0006 RX_Data_Master: 0xFFFF
6 TX_Data_Slave: 0x0017 RX_Data_Slave: 0x0000 TX_Data_Master: 0x0007 RX_Data_Master: 0xFFFF
7 TX_Data_Slave: 0x0018 RX_Data_Slave: 0x0000 TX_Data_Master: 0x0008 RX_Data_Master: 0xFFFF
8 TX_Data_Slave: 0x0019 RX_Data_Slave: 0x0000 TX_Data_Master: 0x0009 RX_Data_Master: 0xFFFF
9 TX_Data_Slave: 0x001A RX_Data_Slave: 0x0000 TX_Data_Master: 0x000A RX_Data_Master: 0xFFFF
10 TX_Data_Slave: 0x001B RX_Data_Slave: 0x0000 TX_Data_Master: 0x000B RX_Data_Master: 0xFFFF
11 TX_Data_Slave: 0x001C RX_Data_Slave: 0x0000 TX_Data_Master: 0x000C RX_Data_Master: 0xFFFF
12 TX_Data_Slave: 0x001D RX_Data_Slave: 0x0000 TX_Data_Master: 0x000D RX_Data_Master: 0xFFFF
13 TX_Data_Slave: 0x001E RX_Data_Slave: 0x0000 TX_Data_Master: 0x000E RX_Data_Master: 0xFFFF
14 TX_Data_Slave: 0x001F RX_Data_Slave: 0x0000 TX_Data_Master: 0x000F RX_Data_Master: 0xFFFF
15 TX_Data_Slave: 0x0020 RX_Data_Slave: 0x0000 TX_Data_Master: 0x0010 RX_Data_Master: 0xFFFF
16 TX_Data_Slave: 0xFFFF RX_Data_Slave: 0x83EF TX_Data_Master: 0x0011 RX_Data_Master: 0x0000

I've hooked up an osciloscope and I can see clearly that the slave select is never being pulled down, and as a result the slave never sends data back either. I also see (by commenting out the spiTansmitAndReceiveData function) that the tx and rx by interrupt mode doesn't function. I've attached a picture of the osciloscope output, order of the lines from top to bottom is clk, slave selected, SOMI, and SIMO. SIMO looks about right for the data I've input, and it looks like the slave select gets jumpy which to me would indicate some kind of bus-fighting for control of ss. But as shown in my halcogen settings, I've disabled the dir checkbox for the SPI2 port tab on CS.

Any suggestions on what I'm doing wrong?

  • 0
    Intellectual 890 points

    Forgot one more picture of the scope output: 

  • 0 in reply to Andrew Hartnett
    Mastermind 7585 points

    Andrew,

    for SPI I usually initialize HalCoGen for all unused SPI-Signals, such as ENA and all unused CSx, to GIO and to Input.

    Try this modification and see if it helps.   

     

  • 0 in reply to Frank Bormann
    Intellectual 890 points

    Thanks for the suggestion Frank. Unfortunately I see no changed on the scope output for functionality. 

    I'll add that when I disconnect the CS from SPI2, it pulls the CS line low on the scope, so it seems somehow that SPI2 is holding it up (and the CS is obviously picking up something from the clock). I'll keep messing with some settings there as to what could be going on.

  • 0 in reply to Andrew Hartnett
    Intellectual 890 points

    I posted this about a week ago and haven't seen any response from any TI engineers, can I at least get an acknowledgement that this is on someone's radar?

    Thanks,

  • 0 in reply to Andrew Hartnett
    TI__Mastermind 22715 points

    Hi, there.

    Sorry for the late response. Since it is a Halcogen issue, I have passed your post to Halcogen team. They will address this issue shortly.

    Thanks and regards,

    Zhaohong

  • 0 in reply to Zhaohong Zhang
    Intellectual 890 points

    I would be surprised if it's a HalCoGen issue. It may be - but I have not come across HalCoGen incorrectly generating code. I think it's a problem in the example SPI code found in the examples folder in HalCoGen - so I guess it may still be managed by that team.

  • 0 in reply to Andrew Hartnett
    TI__Genius 14205 points

    Hi Andrew,

    Attached is the same Example with the complete Project file, both HALCoGen 3.08.01 and CCS. It's working for us, please try the same at your setup. 2474.spi2spi.zip

  • 0 in reply to Prathap
    Intellectual 890 points

    I tried this project, the only changes I had to make were in the properties for a different emulator (TI XDS100v2 USB) and variant (RM48L950).

    When I run the code, I see two things.

    1) spiSendAndGetData does nothing, which doesn't surprise me because spiREG2 should be the slave and can't initiate data transfer, right? Not sure how it's working for you that you're getting anything back on RX_DATA_slave

    2) spiTransmitAndReceive() returns all 0xFFFF into RX_Data_Master, rather than 0x11,0x12....also, on the scope, I never see the CS go high, it's low the entire time. since CS_HOLD is false, I would expect that to be pulled back high when no transfer is being initiated. I do see the correct data being sent out on SIMO, but SOMI is held high the entire time (which makes sense since I'm reading 0xFF).

    Thoughts? 

  • 0 in reply to Andrew Hartnett
    TI__Genius 14205 points

    spiSendAndGetData - SPI2, which is Slave has both TX and RX Interrupt Enabled, it configures the interrupt, populates a data structure and comes out, no data transfer is expected here

    spiTransmitAndReceive() - SPI1, which is Master, has both TX and RX configured in polling mode. Since this initiates a transfer and receives in this function. Where as SPI2 ( Slave ) does everything in Interrupt service routines.

    I monitoreed the CS on SCOPE i see it toggling for every data transfer.

    Try keeping break point after the spiTransmitAndReceive() and let it run do not disturb inbetween.

  • 0 in reply to Prathap
    TI__Mastermind 22375 points

    Hi Andrew,

    I did try on my setup the code provided by Prathap on my RM48 HDK board.
    It is working as expected.

    Here is a screen shoot of all signals on the scope.

    View from Master side,

    Yellow is Chip Select.
    Pink is Clock.
    Green is SOMI
    Blue is SIMO

    Of course for this test to run correctly, external wiring is required. I will suggest to check on your setup that you have the correct connection between your SPI1 and SPI2.

  • 0 in reply to Jean-Marc Mifsud
    Intellectual 890 points

    Thank you all for your help and suggestions.

    I discovered the problem was because I had been doing lwip development I had the ethernet switch turned on, meaning that the mux (U10) was not outputing the chip select signal and it was instead OCHI_PRT_RCVDATA0 (I believe) on the connector.