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Where did Wide Timers in Tivaware 2.1 for 129X go?

Hello all.

I am porting some code, and found that if you try to use a Wide Timer on a 129X board, you get that SYSCTL_PERIPH_WTIMERX (as X in number) is defined, WTIMERX_BASE is also defined but the interruption definitions are not present for the 129X family.

However it is worth notice that there is a define for this:

 #define INT_WTIMER0A            INT_CONCAT(INT_WTIMER0A_, INT_DEVICE_CLASS)

But at compiling time we get:

Description Resource Path Location Type
identifier "INT_WTIMER0A_TM4C129" is undefined example.c /example line 1626 C/C++ Problem

Thank you.

  • Hello PAk

    The TM4C129 does not have Wide Timers.

    Regards

    Amit

  • Amit Ashara said:

    Hello PAk

    The TM4C129 does not have Wide Timers.

    Regards

    Amit

    Thank you Amit.

    Ok, will have that in mind. However using wide timers on TM4C129x on Tivaware 2.1 gets your program compiled....don't you think it should throw an exception?

    Regards.

  • Hello PAk,

    Compiling and execution are two different things. Compiler does not know what the implementation effect is going to be.

    A compilation exception should be thrown and I would need to see if anything on this line is being planned for TIVAWare.

    Regards

    Amit

  • Amit Ashara said:

    Hello PAk,

    Compiling and execution are two different things. Compiler does not know what the implementation effect is going to be.

    A compilation exception should be thrown and I would need to see if anything on this line is being planned for TIVAWare.

    Regards

    Amit

    Thank you Amit.

    I am also finding some issues with the 129 Timer Bs (no interrupt captured), but if the Timers are set up in the A "part" of the timer everything works without problems.

    Is there anything new to configure in the 129X regarding Timers?

     

    I am investigating as well why uDMA is always captured in the ADC interrupt in mode PINGPONG and never reaches the UDMA_MODE_STOP state.

    As I told you, the code was warking on a 123 Tiva chip, it was proven and worked flawlessly.

    Is there any document pointing the differences between 123 and 129 families? Something like the spma050a.pdf document (Migrating Software Projects from StellarisWare to TivaWare)

    Thank you, your help is great!!

  • Hello PAk,

    There should be no difference from TM4C123 to TM4C129 for timer configuration. However do check that the startup_ccs.c has the correct vector number mapped for the timer b interrupt handler.

    Refer to the following document for changes

    http://www.ti.com/lit/an/spma065/spma065.pdf

    A code post or project zip would be useful to debug...

    Regards

    Amit

  • Amit Ashara said:
    There should be no difference from TM4C123 to TM4C129 for timer configuration. However do check that the startup_ccs.c has the correct vector number mapped for the timer b interrupt handler.

    I tripled checked this. I also tried to change the Timer number, and found the Timers on B aren't captured.

    Amit Ashara said:

    Refer to the following document for changes

    http://www.ti.com/lit/an/spma065/spma065.pdf

    That is handy!!

    Amit Ashara said:
    A code post or project zip would be useful to debug...

    I have tested it with the timers example, just changing Timer1 to subtimer B (instead of full). The rest stays the same but for the startup_ccs.c file , where I changed the reference of the vector table of Timer1IntHandler from "Timer 1 subtimer A" to "Timer 1 subtimer B"

    /*****************************************************************************
    //
    // The interrupt handler for the second timer interrupt.
    //
    //*****************************************************************************
    void
    Timer1IntHandler(void)
    {
        char cOne, cTwo;
    
        //
        // Clear the timer interrupt.
        //
        ROM_TimerIntClear(TIMER1_BASE, TIMER_TIMB_TIMEOUT);
    
        //
        // Toggle the flag for the second timer.
        //
        HWREGBITW(&g_ui32Flags, 1) ^= 1;
    
        //
        // Use the flags to Toggle the LED for this timer
        //
        GPIOPinWrite(GPIO_PORTN_BASE, GPIO_PIN_1, g_ui32Flags);
    
        //
        // Update the interrupt status.
        // 
        ROM_IntMasterDisable();
        cOne = HWREGBITW(&g_ui32Flags, 0) ? '1' : '0';
        cTwo = HWREGBITW(&g_ui32Flags, 1) ? '1' : '0';
        UARTprintf("\rT1: %c  T2: %c", cOne, cTwo);
        ROM_IntMasterEnable();
    }
    //*****************************************************************************
    //
    // This example application demonstrates the use of the timers to generate
    // periodic interrupts.
    //
    //*****************************************************************************
    int
    main(void)
    {
        //
        // Set the clocking to run directly from the crystal at 120MHz.
        //
        g_ui32SysClock = MAP_SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
                                                 SYSCTL_OSC_MAIN |
                                                 SYSCTL_USE_PLL |
                                                 SYSCTL_CFG_VCO_480), 120000000);
    
        //
        // Initialize the UART and write status.
        //
        ConfigureUART();
    
        UARTprintf("\033[2JTimers example\n");
        UARTprintf("T1: 0  T2: 0");
    
        //
        // Enable the GPIO port that is used for the on-board LEDs.
        //
        ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
    
        //
        // Enable the GPIO pins for the LEDs (PN0 & PN1).
        //
        ROM_GPIOPinTypeGPIOOutput(GPIO_PORTN_BASE, GPIO_PIN_0 | GPIO_PIN_1);
    
    
        //
        // Enable the peripherals used by this example.
        //
        ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
        ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1);
    
        //
        // Enable processor interrupts.
        //
        ROM_IntMasterEnable();
    
        //
        // Configure the two 32-bit periodic timers.
        //
        ROM_TimerConfigure(TIMER0_BASE, TIMER_CFG_PERIODIC);
        ROM_TimerConfigure(TIMER1_BASE, TIMER_CFG_B_PERIODIC);
        ROM_TimerLoadSet(TIMER0_BASE, TIMER_A, g_ui32SysClock*2);//alargo
        ROM_TimerLoadSet(TIMER1_BASE, TIMER_B, g_ui32SysClock);
    
        //
        // Setup the interrupts for the timer timeouts.
        //
        ROM_IntEnable(INT_TIMER0A);
        ROM_IntEnable(INT_TIMER1B);
        ROM_TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
        ROM_TimerIntEnable(TIMER1_BASE, TIMER_TIMB_TIMEOUT);
    
        //
        // Enable the timers.
        //
        ROM_TimerEnable(TIMER0_BASE, TIMER_A);
        ROM_TimerEnable(TIMER1_BASE, TIMER_B);
    
        //
        // Loop forever while the timers run.
        //
        while(1)
        {
        }
    }
    

    Regards

  • Hello PAk,

    Timer A and B configuration for 16-bit mode should be as followes

    ROM_TimerConfigure(TIMER0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC);
    ROM_TimerConfigure(TIMER1_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_B_PERIODIC);

    Else they would remain in 32-bit mode where Timer-B will not work

    Regards

    Amit

  • Amit Ashara said:

    Timer A and B configuration for 16-bit mode should be as followes

    ROM_TimerConfigure(TIMER0_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_A_PERIODIC);
    ROM_TimerConfigure(TIMER1_BASE, TIMER_CFG_SPLIT_PAIR | TIMER_CFG_B_PERIODIC);

    Else they would remain in 32-bit mode where Timer-B will not work

    Ok, I see,  interesting that the other code used to work on a Tiva 123 device.

    However, with this new code you proposed, I get a 443 Hz signal in Timer 0A, no matter what value I write on TimerLoadSet.

     


    My mistake....UARTprintf was playing us!!!

  • Thank you Amit, all is clear regarding this issue!!

  • Hello PAk,

    When porting tests from TM4C123 to TM4C129 you may want to look at "examples" in TIVAWare

    Regards,

    Amit