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TM4C1294 EPI -> DMA-PingPong



Hello Community,

i have problems to use the EPI in GP Mode... I use high clock rates and so I need the DMA interaction... my problem is the "feature" of the extra DMA Counter in the EPI registers... 

I have no idea how i can call the interrupt and keep the DMA running... because every time I want call the "DMA ready interrupt", I have to set the EPIDMATxCount correctly... and without calling the interrupt I can't set the new pingpong transaction...

Did I miss a thing?

void ExternalBusInterface(void)
{
	uint32_t mode = uDMAChannelModeGet(UDMA_CH21_EPI0TX | UDMA_PRI_SELECT);



	if(mode == UDMA_MODE_STOP)
	{


		uDMAChannelTransferSet(UDMA_CH21_EPI0TX | UDMA_PRI_SELECT,
											   UDMA_MODE_PINGPONG, &actuell_outgoing_image[dma_counter],
											   (void *)(matrix_epi_buf),
											   send_dma_one);
		
		//DMA is stoping until i reset this!!!
		EPIDMATxCount(EPI0_BASE,send_dma_one);


		dma_counter += send_dma_one;


		if(dma_counter >= ((256*256)-send_dma_one)) {
			dma_counter = 0;
			GPIO_PORTN_DATA_R ^= 0x01;
		}
	}

	mode = uDMAChannelModeGet(UDMA_CH21_EPI0TX | UDMA_ALT_SELECT);

	if(mode == UDMA_MODE_STOP)
	{


		uDMAChannelTransferSet(UDMA_CH21_EPI0TX | UDMA_ALT_SELECT,
												UDMA_MODE_PINGPONG, &actuell_outgoing_image[dma_counter],
											   (void *)(matrix_epi_buf),
											   send_dma_one);
		//DMA is stoping until i reset this!!!
		EPIDMATxCount(EPI0_BASE,send_dma_one);

		dma_counter += send_dma_one;

		if(dma_counter >= ((256*256)-send_dma_one)) {
			dma_counter = 0;
			GPIO_PORTN_DATA_R ^= 0x01;
		}
	}

    // Clear the requested interrupt sources.
    //
	//EPI0_EISC_R = 0x00000010;
	EPI0_EISC_R = 0xFFFFFFFF;

}

Bye Basti

  • Hello Sebastian,

    You can instead use the uDMA in Software Mode which would be akin to CPU writing to EPI w/o DMA TX Count being programmed.

    Regards

    Amit

  • hm, that will be cause a blocking data bus... the bus load is allready high and the bottle neck in my application :-/

    But I will try this, if there is no other option...

    thx

  • I think there is a Hardware-Bug in the EPIDMATXCNT register...

    If I set this register to 1024, the interrupt is always triggering with DMA Ready

    1024 -> 11 Bit -> 1023 ->10 Bit

    Is there is a problem to detect zero correctly?

  • Hello Sebasstian

    The UDMA cannot do more than 1024 transfers. Hence the EPI Should be set up for not more than 1023.

    This is mentioned in EPIDMATxCount API as well

    Regards

    Amit

  • Without PingPong Mode its working... 

    but with PingPong Mode the other DMA Channel is waiting for the new EPI Cnt and maybe there is a timing or access problem?! (race condition?)

    The EPI TX seems not really made for ping pong mode... :-/

    I changed the working code a bit, to make the DMA transfer faster... but it works unstable...depends on delays and transfer count... 1024 triggers the interrupt in an endless loop :-/

    void ExternalBusInterface(void)
    {
    int i;
    for(i=0;i<10;i++) asm("nop");
    EPIDMATxCount(EPI0_BASE,1024);
        uint32_t mode = uDMAChannelModeGet(UDMA_CH21_EPI0TX | UDMA_PRI_SELECT);
        if(mode == UDMA_MODE_STOP)
        {
  • Hello Sebastian,

    In Ping Pong Mode when the Ping Buffer is done, the uDMA will switch to the Pong Buffer for which it needs a new DMA Request. The previous DMA request will not valid here for which DONE is already asserted. That is why it is waiting for a new EPI Count to be written so that Pong can work, and so on..

    This needs to be a note

    Now when you program 1024, was the mode still Ping Pong? or was it Basic? Also what do you mean by making the DMA Transfer Faster?

    Regards

    Amit

  • Sorry, I got it not...

    I have to go deeper in me and my source code... there is a hard timing issue, about EPI Interrupt calling and setting a new DMA Transfer count in the EPI interface :-/

    Fast means: closing the "stopping transfer gaps"... shorten the time from ping to pong

  • Hello Sebastian,

    OK. Let me know if you find something.

    Regards

    Amit

  • Hello Amit,

    I am back... I managed it with a small workaround... I try to set the uDMA EPI Counter on two different places in the DMA ready Interrupt... it's not so perfect, but the "stop sending" gap is now smaller ;)

    Here is the reason why I tryed to be so fast:

    https://sebastianfoerster86.wordpress.com/2014/06/02/2048-pixel-rgb-led-matrix-basic/

    Source Code is also available... Later I will go deeper into the technics and I will explain more of the source code (but in german).

    I drive 1024 RGB LEDs with on TI Board. With the power of the tiva dev board, some FPGA Solutions for this panels have less colors and lesser refresh rates ;)

    Is it possible to tune the processor clock a bit higher? Whats a (hobbist) stablest clock rate?

    Regards

    Basti

  • Hello Sebastian,

    That is a great video. Congrats!!!

    What is the current system clock you are working on (I would expect it to be 120MHz). At most I would give it another 10%, but it may not be stable if the device temperature rises. Risk of Potential damage as well for extended use.

    Regards

    Amit