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Input Edge Counter Tm4C123GH6PGE

Other Parts Discussed in Thread: TM4C123BH6PGE

Hi ,

I had declared the interrupt handler in ccs file yet i m not able to capture the interrupt never come .

is there anything i miss in the code . plz find the code below

#define TARGET_IS_BLIZZARD_RB1

#include <stdbool.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include "driverlib/timer.h"
#include "inc/hw_memmap.h"
#include "driverlib/rom.h"
#include "driverlib/rom_map.h"
#include "driverlib/sysctl.h"
#include "driverlib/gpio.h"
#include "inc/hw_gpio.h"
#include "driverlib/pin_map.h"
#include "inc/hw_ssi.h"
#include "driverlib/ssi.h"
#include "inc/tm4c123bh6pge.h"
#include "inc/hw_types.h"

#define LED_ON  GPIO_PIN_1
#define LED_OFF ~(GPIO_PIN_1)

void Timer5ISR(void )
{
    int i;
    ROM_TimerIntClear(TIMER5_BASE,TIMER_CAPB_MATCH);
        for(i = 0; i < 100000000; i++)
        {
            ROM_GPIOPinWrite(GPIO_PORTP_BASE, GPIO_PIN_1, LED_ON );
            ROM_SysCtlDelay(100);
            ROM_GPIOPinWrite(GPIO_PORTP_BASE, GPIO_PIN_1, LED_OFF );
        }
    ROM_TimerEnable(TIMER5_BASE,TIMER_B);
}

int main(void) {
    //
    //System Clock used is 20 MHz with single divisor and main oscillator with 20 MHz frequency
    //
    ROM_SysCtlClockSet(SYSCTL_SYSDIV_1|SYSCTL_USE_OSC|SYSCTL_OSC_MAIN|SYSCTL_XTAL_20MHZ);
    //
    // Enable Timer 5 and Port P
    //
    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER5);
    ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);
    ROM_GPIOPinTypeGPIOOutput(GPIO_PORTP_BASE,GPIO_PIN_1);
    //
    //Timer pin configuration and Timer function muxing
    //
    ROM_GPIOPinTypeTimer(GPIO_PORTP_BASE,GPIO_PIN_2);
    ROM_GPIOPinConfigure(GPIO_PP2_T5CCP0);
    //
    //Configuration Settings for Pin with weak pull up
    //
    ROM_GPIOPadConfigSet(GPIO_PORTP_BASE, GPIO_PIN_1,GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);
    ROM_GPIOPadConfigSet(GPIO_PORTP_BASE, GPIO_PIN_2,GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);
    //
    //Timer Settings
    //

    // Timer Configuration of B as a half width timer in a counting mode
    ROM_TimerConfigure(TIMER5_BASE,TIMER_CFG_SPLIT_PAIR|TIMER_CFG_B_CAP_COUNT);
    //Associate an event as the capture of positive edge of pulse
    ROM_TimerControlEvent(TIMER5_BASE,TIMER_B,TIMER_EVENT_POS_EDGE);
    //First Position of counter
    ROM_TimerLoadSet(TIMER5_BASE,TIMER_B,1000);
    //Final Matching position of counter
    ROM_TimerMatchSet(TIMER5_BASE,TIMER_B,0);

    //
    //Timer Interrupt
    //
    ROM_IntMasterEnable();
    // Enable the Interrupt on Matching
    ROM_IntEnable(INT_TIMER5B);
    ROM_TimerIntEnable(TIMER5_BASE,TIMER_CAPB_MATCH );

    // Timer Enable
    ROM_TimerEnable(TIMER5_BASE,TIMER_B);

    while(1)
    {

    }
    return 0;
}

  • Hello Shubham

    Is the Timer5ISR mapped in the startup_ccs.c?

    EDIT: is it mapped for timer 5b in the startup_ccs.c

    Regards

    Amit

  • Hi Arora,

    I will analyze your code, and come back to you later.

    Regards,

    QJ

  • Yes i had here is the file

    //*****************************************************************************
    //
    // Startup code for use with TI's Code Composer Studio.
    //
    // Copyright (c) 2011-2013 Texas Instruments Incorporated.  All rights reserved.
    // Software License Agreement
    //
    // Software License Agreement
    //
    // Texas Instruments (TI) is supplying this software for use solely and
    // exclusively on TI's microcontroller products. The software is owned by
    // TI and/or its suppliers, and is protected under applicable copyright
    // laws. You may not combine this software with "viral" open-source
    // software in order to form a larger program.
    //
    // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
    // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
    // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
    // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
    // DAMAGES, FOR ANY REASON WHATSOEVER.
    //
    //*****************************************************************************

    #include <stdint.h>

    //*****************************************************************************
    //
    // Forward declaration of the default fault handlers.
    //
    //*****************************************************************************
    void ResetISR(void);
    static void NmiSR(void);
    static void FaultISR(void);
    static void IntDefaultHandler(void);

    //*****************************************************************************
    //
    // External declaration for the reset handler that is to be called when the
    // processor is started
    //
    //*****************************************************************************
    extern void _c_int00(void);

    //*****************************************************************************
    //
    // Linker variable that marks the top of the stack.
    //
    //*****************************************************************************
    extern uint32_t __STACK_TOP;

    //*****************************************************************************
    //
    // External declarations for the interrupt handlers used by the application.
    //
    //*****************************************************************************
    extern void Timer5ISR(void );

    //*****************************************************************************
    //
    // The vector table.  Note that the proper constructs must be placed on this to
    // ensure that it ends up at physical address 0x0000.0000 or at the start of
    // the program if located at a start address other than 0.
    //
    //*****************************************************************************
    #pragma DATA_SECTION(g_pfnVectors, ".intvecs")
    void (* const g_pfnVectors[])(void) =
    {
        (void (*)(void))((uint32_t)&__STACK_TOP),
                                                // The initial stack pointer
        ResetISR,                               // The reset handler
        NmiSR,                                  // The NMI handler
        FaultISR,                               // The hard fault handler
        IntDefaultHandler,                      // The MPU fault handler
        IntDefaultHandler,                      // The bus fault handler
        IntDefaultHandler,                      // The usage fault handler
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        IntDefaultHandler,                      // SVCall handler
        IntDefaultHandler,                      // Debug monitor handler
        0,                                      // Reserved
        IntDefaultHandler,                      // The PendSV handler
        IntDefaultHandler,                      // The SysTick handler
        IntDefaultHandler,                      // GPIO Port A
        IntDefaultHandler,                      // GPIO Port B
        IntDefaultHandler,                      // GPIO Port C
        IntDefaultHandler,                      // GPIO Port D
        IntDefaultHandler,                      // GPIO Port E
        IntDefaultHandler,                      // UART0 Rx and Tx
        IntDefaultHandler,                      // UART1 Rx and Tx
        IntDefaultHandler,                      // SSI0 Rx and Tx
        IntDefaultHandler,                      // I2C0 Master and Slave
        IntDefaultHandler,                      // PWM Fault
        IntDefaultHandler,                      // PWM Generator 0
        IntDefaultHandler,                      // PWM Generator 1
        IntDefaultHandler,                      // PWM Generator 2
        IntDefaultHandler,                      // Quadrature Encoder 0
        IntDefaultHandler,                      // ADC Sequence 0
        IntDefaultHandler,                      // ADC Sequence 1
        IntDefaultHandler,                      // ADC Sequence 2
        IntDefaultHandler,                      // ADC Sequence 3
        IntDefaultHandler,                      // Watchdog timer
        IntDefaultHandler,                      // Timer 0 subtimer A
        IntDefaultHandler,                      // Timer 0 subtimer B
        IntDefaultHandler,                      // Timer 1 subtimer A
        IntDefaultHandler,                      // Timer 1 subtimer B
        IntDefaultHandler,                      // Timer 2 subtimer A
        IntDefaultHandler,                      // Timer 2 subtimer B
        IntDefaultHandler,                      // Analog Comparator 0
        IntDefaultHandler,                      // Analog Comparator 1
        IntDefaultHandler,                      // Analog Comparator 2
        IntDefaultHandler,                      // System Control (PLL, OSC, BO)
        IntDefaultHandler,                      // FLASH Control
        IntDefaultHandler,                      // GPIO Port F
        IntDefaultHandler,                      // GPIO Port G
        IntDefaultHandler,                      // GPIO Port H
        IntDefaultHandler,                      // UART2 Rx and Tx
        IntDefaultHandler,                      // SSI1 Rx and Tx
        IntDefaultHandler,                      // Timer 3 subtimer A
        IntDefaultHandler,                      // Timer 3 subtimer B
        IntDefaultHandler,                      // I2C1 Master and Slave
        IntDefaultHandler,                      // Quadrature Encoder 1
        IntDefaultHandler,                      // CAN0
        IntDefaultHandler,                      // CAN1
        IntDefaultHandler,                      // CAN2
        0,                                      // Reserved
        IntDefaultHandler,                      // Hibernate
        IntDefaultHandler,                      // USB0
        IntDefaultHandler,                      // PWM Generator 3
        IntDefaultHandler,                      // uDMA Software Transfer
        IntDefaultHandler,                      // uDMA Error
        IntDefaultHandler,                      // ADC1 Sequence 0
        IntDefaultHandler,                      // ADC1 Sequence 1
        IntDefaultHandler,                      // ADC1 Sequence 2
        IntDefaultHandler,                      // ADC1 Sequence 3
        0,                                      // Reserved
        0,                                      // Reserved
        IntDefaultHandler,                      // GPIO Port J
        IntDefaultHandler,                      // GPIO Port K
        IntDefaultHandler,                      // GPIO Port L
        IntDefaultHandler,                      // SSI2 Rx and Tx
        IntDefaultHandler,                      // SSI3 Rx and Tx
        IntDefaultHandler,                      // UART3 Rx and Tx
        IntDefaultHandler,                      // UART4 Rx and Tx
        IntDefaultHandler,                      // UART5 Rx and Tx
        IntDefaultHandler,                      // UART6 Rx and Tx
        IntDefaultHandler,                      // UART7 Rx and Tx
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        IntDefaultHandler,                      // I2C2 Master and Slave
        IntDefaultHandler,                      // I2C3 Master and Slave
        IntDefaultHandler,                      // Timer 4 subtimer A
        IntDefaultHandler,                      // Timer 4 subtimer B
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        IntDefaultHandler,                      // Timer 5 subtimer A
        Timer5ISR,                              // Timer 5 subtimer B
        IntDefaultHandler,                      // Wide Timer 0 subtimer A
        IntDefaultHandler,                      // Wide Timer 0 subtimer B
        IntDefaultHandler,                      // Wide Timer 1 subtimer A
        IntDefaultHandler,                      // Wide Timer 1 subtimer B
        IntDefaultHandler,                      // Wide Timer 2 subtimer A
        IntDefaultHandler,                      // Wide Timer 2 subtimer B
        IntDefaultHandler,                      // Wide Timer 3 subtimer A
        IntDefaultHandler,                      // Wide Timer 3 subtimer B
        IntDefaultHandler,                      // Wide Timer 4 subtimer A
        IntDefaultHandler,                      // Wide Timer 4 subtimer B
        IntDefaultHandler,                      // Wide Timer 5 subtimer A
        IntDefaultHandler,                      // Wide Timer 5 subtimer B
        IntDefaultHandler,                      // FPU
        0,                                      // Reserved
        0,                                      // Reserved
        IntDefaultHandler,                      // I2C4 Master and Slave
        IntDefaultHandler,                      // I2C5 Master and Slave
        IntDefaultHandler,                      // GPIO Port M
        IntDefaultHandler,                      // GPIO Port N
        IntDefaultHandler,                      // Quadrature Encoder 2
        0,                                      // Reserved
        0,                                      // Reserved
        IntDefaultHandler,                      // GPIO Port P (Summary or P0)
        IntDefaultHandler,                      // GPIO Port P1
        IntDefaultHandler,                      // GPIO Port P2
        IntDefaultHandler,                      // GPIO Port P3
        IntDefaultHandler,                      // GPIO Port P4
        IntDefaultHandler,                      // GPIO Port P5
        IntDefaultHandler,                      // GPIO Port P6
        IntDefaultHandler,                      // GPIO Port P7
        IntDefaultHandler,                      // GPIO Port Q (Summary or Q0)
        IntDefaultHandler,                      // GPIO Port Q1
        IntDefaultHandler,                      // GPIO Port Q2
        IntDefaultHandler,                      // GPIO Port Q3
        IntDefaultHandler,                      // GPIO Port Q4
        IntDefaultHandler,                      // GPIO Port Q5
        IntDefaultHandler,                      // GPIO Port Q6
        IntDefaultHandler,                      // GPIO Port Q7
        IntDefaultHandler,                      // GPIO Port R
        IntDefaultHandler,                      // GPIO Port S
        IntDefaultHandler,                      // PWM 1 Generator 0
        IntDefaultHandler,                      // PWM 1 Generator 1
        IntDefaultHandler,                      // PWM 1 Generator 2
        IntDefaultHandler,                      // PWM 1 Generator 3
        IntDefaultHandler                       // PWM 1 Fault
    };

    //*****************************************************************************
    //
    // This is the code that gets called when the processor first starts execution
    // following a reset event.  Only the absolutely necessary set is performed,
    // after which the application supplied entry() routine is called.  Any fancy
    // actions (such as making decisions based on the reset cause register, and
    // resetting the bits in that register) are left solely in the hands of the
    // application.
    //
    //*****************************************************************************
    void
    ResetISR(void)
    {
        //
        // Jump to the CCS C initialization routine.  This will enable the
        // floating-point unit as well, so that does not need to be done here.
        //
        __asm("    .global _c_int00\n"
              "    b.w     _c_int00");
    }

    //*****************************************************************************
    //
    // This is the code that gets called when the processor receives a NMI.  This
    // simply enters an infinite loop, preserving the system state for examination
    // by a debugger.
    //
    //*****************************************************************************
    static void
    NmiSR(void)
    {
        //
        // Enter an infinite loop.
        //
        while(1)
        {
        }
    }

    //*****************************************************************************
    //
    // This is the code that gets called when the processor receives a fault
    // interrupt.  This simply enters an infinite loop, preserving the system state
    // for examination by a debugger.
    //
    //*****************************************************************************
    static void
    FaultISR(void)
    {
        //
        // Enter an infinite loop.
        //
        while(1)
        {
        }
    }

    //*****************************************************************************
    //
    // This is the code that gets called when the processor receives an unexpected
    // interrupt.  This simply enters an infinite loop, preserving the system state
    // for examination by a debugger.
    //
    //*****************************************************************************
    static void
    IntDefaultHandler(void)
    {
        //
        // Go into an infinite loop.
        //
        while(1)
        {
        }
    }

  • i think its not about the isr ,i had used this api TimerValueGet in while(1) and to my astonishment the value returned is always 1000  . It seems that timer hasn't started at all  . Is there any flaw with the code ?

  • Hello Shubham

    Do you intend to use the Timer for counting edges or timing when a edge occurs?

    Regards

    Amit

  • HI Amit ,

    My intention is to count the 1000 negative edges of square wave pulse which is the input to timer (PP2 timer pin).

    So i want to use timer for counting edges .

    Regards

    Shubham Arora

  • Hello Shubham,

    I would suggest using a smaller value so that you can check by using GPIO Toggle.

    Also what is the frequency of these edges. Please note that you can give a high frequency signal to the Timer and expect it to count properly.

    Regards

    Amit

  • Hi Amit ,

    I have made following change ROM_TimerLoadSet(TIMER5_BASE,TIMER_B,10) but still not expected result the worst part is that TimerValueGet always return 10 hence timer has not detect any single pulse .

    the frequency of input pulse is 1Khz .

  • Hello Shubham

    Wrong pin was being used for Timer 5B. The Pin is PG3 and not PP2. CCP0 pins are meant for Timer A and CCP1 Pins are meant for Timer B. I made the following change and it works now.

        ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
        ROM_GPIOPinTypeGPIOOutput(GPIO_PORTP_BASE,GPIO_PIN_1);
        //
        //Timer pin configuration and Timer function muxing
        //
        ROM_GPIOPinTypeTimer(GPIO_PORTG_BASE,GPIO_PIN_3);
        ROM_GPIOPinConfigure(GPIO_PG3_T5CCP1);

    Regards

    Amit

  • HI

    Thanks Amit i missed that . I appreciate ur effort .

  • Hi

    Today i tried to reuse the code for up counter ,the changes i made in above code were

    TimerConfigure(TIMER5_BASE, TIMER_CFG_SPLIT_PAIR|TIMER_CFG_B_CAP_COUNT_UP);

    TimerLoadSet(TIMER5_BASE,TIMER_B,0);

    TimerMatchSet(TIMER5_BASE,TIMER_B,1000);

    but it doesn't work do i need to make some more changes ?

    also i read in peripheral library documentation that up counter is not available on all parts

    Edit : Got my mistake it should be like ROM_TimerLoadSet(TIMER3_BASE,TIMER_B,1000);

    LoadSet Register behave differently for up down counter .