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ESM can‘t indicate error

ron chow
Prodigy 240 points

i insert 1 bit error in ram, and it will indicate  corresponding error  in ram wrapper register.  but error was not indicate ESM.  i don’t  know why？  thank u！！！

（but ESM register do not have error been indicated）

  • 0
    TI__Guru 68920 points

    Ron,
    Which part # are you looking at and which ESM register are you checking?

  • 0 in reply to Anthony F. Seely
    Prodigy 240 points

    hi,a

      i am looking at ESM stat1,stat2,stat3,stat4. all those register do not indicate error.

  • 0 in reply to ron chow
    TI__Guru 68920 points

    Hi Ron,

    Looking through our internal docs, I believe the ESM signal is the same as the interrupt, and I see that the interrupt isn't enabled.  You might try enabling the interrupt in the ram wrapper to see if that makes the error also propogate to the ESM.  (Since this is a single bit correctable error).

     

  • 0 in reply to Anthony F. Seely
    Prodigy 240 points

    i think it do not matter with interrupt ,while i enable all interrupt ,but i also can not fond error in stat register.

  • 0 in reply to ron chow
    Intellectual 370 points

    You never answered Anthony's question about the part number of the micro you are using.  It make a difference where the ECC is being checked, and I am pretty sure it varies by part. 

    If the ECC is being checked by the CPU and the event bus export is not enabled it cannot send a signal to the ESM when there is an error. 

     From app note SPNA106D:

     

    Enable the Cortex-R4F CPU’s Event Signaling Mechanism

    The Cortex-R4F CPU has a dedicated event bus that is used to indicate that an event had occurred. This

    event signaling is disabled upon reset and must be enabled. The Flash module and the RAM module

    interfaces capture the ECC error events signaled by the CPU. This allows the application to further debug

    the exact address, which caused the ECC error.

    The CPU event signaling can be enabled by setting the “X” bit of the performance monitoring unit’s

    “Performance monitor control register, c9”.