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HET's status when TMS570 is forced to reset

Other Parts Discussed in Thread: TMS570LS3137

Hi team,
I have a question on HET module in TMS570LS3137. When something wrong happens when TMS570 is running and the CPUs are placed into the reset status, will the HET module be disabled automatically by the internal diagnostic hardware? And what are the output pins’ statuses? High-Z or else?  Thanks for your help!

  • Jason,

    In case of CPU reset, the system module will also receive this reset. As result, the nPRST (Peripheral reset) will be asserted, forcing all peripheral modules back to reset state,

    The NHET will have all pins back to input, and so will not drive anything. 

    The application will have to re-run the full initialization code.

  • Hi Jean-Marc,
    Thanks for your explanation. I have a following question on the nPRST signal. If the device is under power-on reset or warm reset, will also the nPRST signal become active? Thanks!

  • Jason,

    nPRST is an internal signal controlled by the SYSTEM module.

    When the external Power On Reset (nPORST pin) is active, the full device is in reset, and nPRST is cleared (Forcing all peripheral modules in reset state).
    Under this condition, the nRST pin is also force to reset (low). Because nRST is a bi-directional open drain pin, the same scenario will happen if nRST is force low by an external device.

    I will suggest to read the section Power Sequencing and Power On Reset section of the device datasheet.