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What's privileged mode?

matteo lucarelli
Genius 3265 points
Other Parts Discussed in Thread: HALCOGEN

In variuos documentation of you ARM microcontroller I've found notes about privileged mode.

What is it? There are things to take care of when programming the RM48?

Thank you

  • 0
    TI__Mastermind 23000 points

    Hello Matteo,

    The ARM architecture defines multiple modes of operation for the processor.  These can generally be separated into user and privileged modes.  Operation in privileged modes allows greater access to processor resources and is generally reserved for use by operating systems and critical driver software.  User mode is intended for individual tasks and does not give as much access to each software task.  Please refer to the ARM Architecture Reference Manual for v7A/R profiles and the ARM Cortex R4/R5 TRMs for more details.

    TI carries the same ARM architecture scheme over to the Hercules architecture.  Each transaction from the core can be identified as having user or privileged mode attributes.  Hardware deemed critical, such as system configuration registers, often includes restrictions that register contents may only be modified when in privileged modes of operation.  Please see the Hercules device TRMs for more information.

    Best Regards,

    Karl

  • 0 in reply to KGreb
    Genius 3265 points

    Hi Karl,

    I've read both the AMR and the Hercules TRMs but cannot understand how practically manage the Operating modes. Which is the prcedure to change/verify the curent mode?

    Except the SYStem register there are other aspect in wich the operating mode must be taken in care?

    I'm using the F021 library too. Should I expect different behaviour when I'll run out of the debug state?

    Matteo

  • 0 in reply to matteo lucarelli
    TI__Mastermind 23000 points

    Hi Matteo,

    I'd recommend to refer back to the ARM v7A/R Architecture manual (DDI0406B), section B1.6.12, "Supervisor Call (SVC) Exception." This section explains the behavior of the ARM instruction used to change modes to enable a supervisor operation.  B1.3.1, "ARM Processor Modes" in the same document describes the modes and the privilege level supported for each.

    In the TI device TRMs, each register includes a note as to whether privilege modes are needed to access.  For example, consider the legend found with each register description:  

    "LEGEND: R/W = Read/Write; R = Read only; WP = Write in privileged mode only; -n = value after reset"

    If software accessing privilege mode resources is written properly, there is no difference in behavior when using standard vs. debug mode of operation.  I have not seen any issues related to debug noted for the F021 library.  

    Regards,

    Karl

  • 0 in reply to KGreb
    Genius 3265 points

    Hello Karl,

    I haven't any idea where the separation between proviledged and unpriviledged mode occours.

    I'm not using any RTOS so all my code is executing from the main or from some ISR. Do the switch between the modes is automatic? Where does it happens?

    Matteo

  • 0 in reply to matteo lucarelli
    TI__Mastermind 23000 points

    Hi Matteo,

    Please refer to section 2.3, "Operating Modes" of the ARM Cortex R4 TRM.  There are several modes of operation, and exception entry caused a change in mode to privileged states. 

    • IRQ interrupts will result in entry to interrupt mode, which is privileged
    • FIQ interrupts will result in entry to fast interrupt mode, which is privileged
    • Prefetch or data aborts will result in entry to abort mode, which is privileged
    • Undefined instruction exceptions will result in entry to undefined mode, which is privileged

    Two additional privileged modes exist, supervisor (for SVC calls), and system (for the operating system).  The remaining mode of operation is User, which is not privileged.

    When the device comes out of reset, it is in supervisor mode (privileged), as it is expected this is where the RTOS or other task switcher kernel will be configured.  ARM would expect that you transition to user mode for standard task execution.  Even though you are not using an RTOS, if you are using example initialization code such as HALCoGen, then the init code may be transitioning to user mode after initialization.

    Regards,

    Karl

  • 0 in reply to KGreb
    Genius 3265 points

    Hi Karl,

    on my R4 TRM the operating modes paragraph is the 3.2 (not the 2.3) but probably we're referring to different version of the manual. Nevertheless my problem ramains: the TRM offers a simple list of the operating modes but doesn't explain how they are switched. There are specific instruction or system register to do this?

    Is the init code generate by HalCoGen (i suppose the _c_int00 function) produces the switch from system mode to user mode (I suppose that the init procedure must be done in priviged mode) how does it do it? Where?

    Thank you