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RM57 - EMIF (Hal cogen question)

Other Parts Discussed in Thread: HALCOGEN

Hi, I am wondering why  on EMIF: SDRAM config page  the default CAS latency set to zero.

The reference say CAS latency for SDRAM is two - three clock cycles.

Should I change to 2 or zero also works?

Thanks~

-Young

  • Hi Young,

    Please go ahead and change the values in HALCoGen as per your need.
    The settings are based on the type of SDRAM used, hence HALCoGen has all reset i.e., 0. It's users responsibiltiy to ocnfigure the right timing and other configurations.