MIBSPI trigger source off of GIOA3 off by 1 bit

For reference - this is what my project is based off of: http://e2e.ti.com/support/microcontrollers/hercules/f/312/p/311317/1086202.aspx

Andrew,

Would you please more detail about how GIO3 pin is used as trigger? When you see receive data error, did you see it on just one side or both sides?

Thanks and regards,

Zhaohong

The relevant lines of code are: 

    mibspiREG3->TGCTRL[0U] = (1U << 30U)  /* oneshot */
                       | (0U << 29U)  /* pcurrent reset */
                       | (TRG_HIGH << 20U)  /* trigger event */
                       | (TRG_GIOA3 << 16U)  /* trigger source */
                       | (0U << 8U);  /* start buffer */

I've tried different options of TRG_HIGH, LOW, RISING, FALLING, BOTH, etc - but they have no impact (which I wouldn't expect it to). I have the length of the tg set up to be 8, and the data format for set up as a charlen of 16, no clock phase or polarity. 

Both on the master and the slave, the data received is incorrect. Below is the scope output for when I have the slave send 0x8001 and the master send 0x7FFE. 

slave main():

//	unsigned short xmtBuffer[16]={0};
	uint16 TX_data[8] = {0x8001,0x8001,0x8001,0x8001,0x8001,0x8001,0x8001,0x8001};
	uint16 RX_data[8] = {0};
	unsigned int i;

	sciInit();
	gioInit();
	mibspiInit();

	ti_printf("Starting Slave...\r\n");
	run_LED_StartUp();
//	gioSetBit(gioPORTA,3,0);

	mibspiSetData(mibspiREG3, 0, &TX_data[0]);
	mibspiTransfer(mibspiREG3, 0);


	ti_printf("Transfer start....");
	while(mibspiIsTransferComplete(mibspiREG3, 0) == FALSE);
	ti_printf("Transfer complete.\r\n");
	mibspiGetData(mibspiREG3, 0, &RX_data[0]);
//	gioSetBit(gioPORTA,3,1);
	for(i=0;i<8;i++)
	{
		ti_printf("RX_data[i]: %x | ", RX_data[i]);
		ti_printf("TX_data[i]: %x\r\n", TX_data[i]);
	}

	while(1);

master main():

//	unsigned short xmtBuffer[16]={0};
	uint16 TX_data[8] = {0x7FFE,0x7FFE,0x7FFE,0x7FFE,0x7FFE,0x7FFE,0x7FFE,0x7FFE,};
	uint16 RX_data[8] = {0};
	unsigned int i;

	sciInit();
	gioInit();
	gioSetBit(gioPORTA,3,1);
	mibspiInit();

	ti_printf("Starting Master...\r\n");
	gioSetBit(gioPORTA,3,0);
	run_LED_StartUp();

	run_LED_StartUp();
	mibspiSetData(mibspiREG3, 0, &TX_data[0]);
	run_LED_StartUp();
	mibspiTransfer(mibspiREG3, 0);
	run_LED_StartUp();


	ti_printf("Transfer start...");
	while(mibspiIsTransferComplete(mibspiREG3, 0) == FALSE);

	ti_printf("Transfer complete.\r\n");

	mibspiGetData(mibspiREG3, 0, &RX_data[0]);
	run_LED_StartUp();
	gioSetBit(gioPORTA,3,0);
	for(i=0;i<8;i++)
	{
		ti_printf("RX_data[i]: %x | ", RX_data[i]);
		ti_printf("TX_data[i]: %x\r\n", TX_data[i]);
	}

	while(1);

Andrew,

I believe that the issue is caused by the polarity/phase mismatch when you use GIO to replace CS. You would suggest you repeatedly transmit 0x5555. You can record that waveform of CS/GIO, clock, TX and RX data. You should be able to clearly the difference between using CS and GIO.

Thanks and regards,

Zhaohong

I had believed that it was the polarity/phase as well - but it only shifts it further away from the correct answer and the data definitely needs to be latched on the falling edge, so there's really only the two options available. 

Andrew,

I read this post one more time and found that I misunderstood your question. See if my understanding is correct this time.

In the original projects, the transfer group triggers are configured as "always". The SPI transfer will start as soon as the transfer group is enabled. You do not see any error in this setup.

Then you want change the transfer group to be triggered by a GIO pin and you see received data get shifted. From the source code you post, I see that you make the transfer group as GIO triggered on both slave and master.

Based on the above standing, I would guess that the issue you observe is caused by master/slave synchronization. In other words, master starts transfer when slave is not ready. I would like to suggest you to try two experiments.

(1) Only change the transfer at the master side to be GIO triggered. No change on the slave side.

(2) Change the master/slave connection from 4 pin to 5 pin. With SPI_ENA signal, the SPI master will wait for the slave to be ready to start transfer.

Thanks and regards,

Zhaohong