UPDATE (6/24/2014) - Emulation pack 5.1.507.0 was removed from the update server last week due to an issue related to problems debugging a C2000 product. It has been replaced with 5.1.507.1 which is available for download as of today. All the information below is still correct except you will be updating to 5.1.507.1. Plan is to release updates in mid july that remove the need for these workarounds.
We have identified an issue with the currently shipping TI Emulators package (version 5.1.507.0).It is related to the "CPU Reset" feature of the debugger. When this command is issued, the CPU isn't actually reset, instead the emulation software attempts to simply restore CPU registers to their initial state.
However, with TI Emulators package version 5.1.507.0 the SCLTR register (CP15) was added to the list of registers that are set back to their initial state when the CPU is reset - mainly to make sure that the MPU is not enabled. Having the MPU enabled has caused many of the reported error messages that occur when trying to download code into flash.
The problem is that the "EE" bit in this register is always set to '0' when a CPU reset is issued. It should be set to '0' on RM4/RM5 parts and to '1' on TMS570 parts.
Therefore, on TMS570 parts this bit is essentially corrupted when a CPU Reset is issued. The effect isn't immediate. EE sets the endian of the processor when an exception is entered. If the exception handler code is sensitive to the endian being set incorrectly, then it may crash.
Another issue that is related and makes this problem worse is that the "System Reset" feature of the debugger does not reset the CPU if the CPU has been halted.
These issues together can result in a state where the CPU won't run code correctly until a true hardware reset of the CPU occurs (usually by pressing the reset button on a board or by power cycling).
You can determine if you have TI Emulators 5.1.507.0 installed by bringing up the "Installation Details" window in CCS through the Help->About Code Composer Studio->Installation Details menu option. Search the list for "TI Emulators" and check the version. If you have 5.1.507.0 installed it will look like this:
There is a simple fix for the issue that is preventing "System Reset" from resetting the CPU.
On the 'Advanced' tab of the target configuration that you are using to connect to your target hardware, select the PortR4 or PortR5 node of the connection tree and make sure "Type" is set to "debug" and "Psuedo" is unchecked. This is what the tab should look like:
Save the configuration and relaunch the target. To test the fix, you can simply connect to the target and run a program or step so that the program counter is not '0x00000000'. Now issue a "System Reset" only - and you should see the CPU program counter put back to 0x0000000. Previously, this would not happen unless the CPU were running when System Reset was issued.
Making System Reset work correctly will provide an easy way to recover should any of the CPU registers become corrupted. This includes but is not limited to the EE bit of SCTLR. There are other registers that could become corrupted if say a stack overflow resulted in restoring invalid values from the stack into CPU registers that are not reset by the "CPU Reset" command. Now the "System Reset" can be relied upon to restore the CPU and device to a known state.
There currently is no fix for the CPU reset issue; but a workaround is to set the EE bit back to '1' on TMS570 parts immediately after issuing a CPU Reset. This can be automated through a GEL file hook.
If you have a TMS570 part you can add this to your TMS570xxxx.gel file. [DO NOT add this code to the GEL file for RM parts as they should have the EE bit set to '0' not '1']
/*----------------------------------------------------------------------------*/
/* Function - OnReset() */
/* */
OnReset(int nErrorCode){
if (nErrorCode) {
GEL_TextOut("An error occurred while resetting. -%d-\n",,,,, nErrorCode);
}
else {
CP15_SYSTEM_CONTROL = 0x8AE50878;
}
} /* OnReset() */
You should see that the value of the EE bit in the CP15_SYSTEM_CONTROL register is now the same whether the CPU Reset command is issued or the System Reset command is issued [assuming you have made the changes to the target config file recommended earlier so that System Reset is functional].
