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TMS570 Reset when writing PLCTL1 register

Tom McKinney
Prodigy 560 points

It appears that every time S/W writes to the PLLCTL1 register, the processor resets. I am using a 20 MHz oscillator instead of a crystal. Which based on the data sheet is acceptable. In addition I made sure that the PLLs are off when the S/W writes to the PLLCTL1 register.

 

My question is in three parts.

 

1)      Is there an issue with using a standard oscillator (20 MHz 1PPM) instead of a crystal?

2)      Is there a document that spells out the order of sequence that the Osc/PLL register should be written to?

3)      Any thoughts as to what can cause the CPU to reset every time we attempt to write to PLLCTL1 regardless what the values is?

 Thanks,

Tom

  • 0
    TI__Mastermind 19970 points

    Tom,

    A couple of thoughts -- no problem using an oscillator. I assume it is driven by the 3.3V supply; that is, it is not 1.2V nor is it 5V.

    The only way that PLL should generate a RESET is based upn the ROS bit in PLLCTL1 which is the most significant bit (bit 31).  The PLL should not generate a slip based upon writing PLLCTL1 unless it was already active.  Try this.

    Write 0x2 to CSDISSET (0xFFFF_FF34).

    Check CVSTAT bit 1 equals 0. It would not equal 0 if the PLL is being used so if it does not go to 0 check GHVSRC is not 1.

    Now that the part's PLL is disabled, you should have no trouble writing the PLL control registers. When done with PLLCTRL1 and PLLCTRL2, whrite 0x2 to CSDISCLR (0xFFFF_FF38) to start the PLL.

     

    This is explained to some extent in Chapter 10 of spnu499.

    Kevin