I have initialize 8 uart for communication usage.
I have unlock the GPIO with special consideration but there is a strange communication in my application
I want to send a package of command via UART0/UART1/UART2 but only UART2 works.
Here is the code
int main(void)
{
uint32_t ui32Period;
SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_XTAL_25MHZ|SYSCTL_OSC_MAIN);
//CAN_LED
Initial_LCD();
uart_init();
SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);
TimerConfigure(TIMER0_BASE, TIMER_CFG_PERIODIC);
ui32Period = (SysCtlClockGet() / 1000);
TimerLoadSet(TIMER0_BASE, TIMER_A, ui32Period -1);
IntEnable(INT_TIMER0A);
TimerIntEnable(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
IntMasterEnable();
uartIntEnable();
TimerEnable(TIMER0_BASE, TIMER_A);
control_init();
DISP_BYTE(1,0,0xff);
while(1)
{
//CAN_led();
Delivelcd();
Delive_Control();
//uart_work();
test();
}
}
void test(void)
{
// uint8_t ch = 0x0;
uint8_t buf[12]={0xAB,0x8C,0x00,0x4F,
0x3F,0x02,0x05,0x02, 0x00,0xC3,0x32,0x3D};
if(timer==100)
{
uart_send_data(UART0_BASE,buf,12);
uart_send_data(UART1_BASE,buf,12);
uart_send_data(UART2_BASE,buf,12);
timer--;
}
// uart_send_data(UART0_BASE,&ch,1);
// uart_send_data(UART1_BASE,&ch,1);
}
void Timer0IntHandler(void)
{
// Clear the timer interrupt
TimerIntClear(TIMER0_BASE, TIMER_TIMA_TIMEOUT);
if(LCDDelay > 0) LCDDelay--;
if(timer>0)
timer--;
else
{
timer = 2000;
u8_cnt++;
}
//CAN_led();
// Read the current state of the GPIO pin and
// write back the opposite state
// if(GPIOPinRead(GPIO_PORTF_BASE, GPIO_PIN_2))
// {
// GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, 0);
// }
// else
// {
// GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 4);
// }
}
void uart_init(void)
{
uint8_t idx = 0;
uint32_t ui32Period = SysCtlClockGet();
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
GPIOPinConfigure(GPIO_PA0_U0RX);
GPIOPinConfigure(GPIO_PA1_U0TX);
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
UARTConfigSetExpClk(UART0_BASE, ui32Period, 1200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
// IntMasterEnable();
// IntEnable(INT_UART0);
// UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
GPIOPinConfigure(GPIO_PC4_U1RX);
GPIOPinConfigure(GPIO_PC5_U1TX);
GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_4 | GPIO_PIN_5);
UARTConfigSetExpClk(UART1_BASE, ui32Period, 1200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
// IntMasterEnable();
// IntEnable(INT_UART1);
// UARTIntEnable(UART1_BASE, UART_INT_RX | UART_INT_RT);
//PD7,GPIO Pins With Special Considerations
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
HWREG(GPIO_PORTD_BASE + GPIO_O_CR) = GPIO_PIN_7;
GPIOPinConfigure(GPIO_PD6_U2RX);
GPIOPinConfigure(GPIO_PD7_U2TX);
GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_6 | GPIO_PIN_7);
HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
HWREG(GPIO_PORTD_BASE + GPIO_O_CR) = 0x00;
HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = 0;
UARTConfigSetExpClk(UART2_BASE, ui32Period, 1200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
// IntMasterEnable();
// IntEnable(INT_UART2);
// UARTIntEnable(UART1_BASE, UART_INT_RX | UART_INT_RT);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART3);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
GPIOPinConfigure(GPIO_PC6_U3RX);
GPIOPinConfigure(GPIO_PC7_U3TX);
GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_6 | GPIO_PIN_7);
UARTConfigSetExpClk(UART3_BASE, ui32Period, 1200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
// IntMasterEnable();
// IntEnable(INT_UART3);
// UARTIntEnable(UART3_BASE, UART_INT_RX | UART_INT_RT);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART4);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
GPIOPinConfigure(GPIO_PJ0_U4RX);
GPIOPinConfigure(GPIO_PJ1_U4TX);
GPIOPinTypeUART(GPIO_PORTJ_BASE, GPIO_PIN_0 | GPIO_PIN_1);
UARTConfigSetExpClk(UART4_BASE, ui32Period, 1200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
// IntMasterEnable();
// IntEnable(INT_UART4);
// UARTIntEnable(UART4_BASE, UART_INT_RX | UART_INT_RT);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART5);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOJ);
GPIOPinConfigure(GPIO_PJ2_U5RX);
GPIOPinConfigure(GPIO_PJ3_U5TX);
GPIOPinTypeUART(GPIO_PORTJ_BASE, GPIO_PIN_2 | GPIO_PIN_3);
UARTConfigSetExpClk(UART5_BASE, ui32Period, 1200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
// IntMasterEnable();
// IntEnable(INT_UART5);
// UARTIntEnable(UART5_BASE, UART_INT_RX | UART_INT_RT);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART6);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
GPIOPinConfigure(GPIO_PD4_U6RX);
GPIOPinConfigure(GPIO_PD5_U6TX);
GPIOPinTypeUART(GPIO_PORTD_BASE, GPIO_PIN_4 | GPIO_PIN_5);
UARTConfigSetExpClk(UART6_BASE, ui32Period, 1200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
// IntMasterEnable();
// IntEnable(INT_UART1);
// UARTIntEnable(UART1_BASE, UART_INT_RX | UART_INT_RT);
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART7);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
GPIOPinConfigure(GPIO_PK4_U7RX);
GPIOPinConfigure(GPIO_PK5_U7TX);
GPIOPinTypeUART(GPIO_PORTK_BASE, GPIO_PIN_4 | GPIO_PIN_5);
UARTConfigSetExpClk(UART7_BASE, ui32Period, 1200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
// IntMasterEnable();
// IntEnable(INT_UART1);
// UARTIntEnable(UART1_BASE, UART_INT_RX | UART_INT_RT);
for(idx = _uart0; idx<=_uart7; idx++)
{
CommandState[idx] = 0;
TXDFlag[idx] = 0;
}
for(idx = _uart0rx; idx<_uart_buf_number; idx++)
{
ringbuf_pwr[idx] = 0;
ringbuf_prd[idx] = 0;
ringbuf_rem[idx] = BUF_L;
}
}
void uartIntEnable(void)
{
//IntMasterEnable();
IntEnable(INT_UART0);
UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
IntEnable(INT_UART1);
UARTIntEnable(UART1_BASE, UART_INT_RX | UART_INT_RT);
IntEnable(INT_UART2);
UARTIntEnable(UART2_BASE, UART_INT_RX | UART_INT_RT);
IntEnable(INT_UART3);
UARTIntEnable(UART3_BASE, UART_INT_RX | UART_INT_RT);
IntEnable(INT_UART4);
UARTIntEnable(UART4_BASE, UART_INT_RX | UART_INT_RT);
IntEnable(INT_UART5);
UARTIntEnable(UART5_BASE, UART_INT_RX | UART_INT_RT);
IntEnable(INT_UART6);
UARTIntEnable(UART6_BASE, UART_INT_RX | UART_INT_RT);
IntEnable(INT_UART7);
UARTIntEnable(UART7_BASE, UART_INT_RX | UART_INT_RT);
}
void UART0IntHandler(void)
{
uint8_t ch=0xFF;
uint32_t ui32Status;
ui32Status = UARTIntStatus(UART0_BASE, true); //get interrupt status
UARTIntClear(UART0_BASE, ui32Status); //clear the asserted interrupts
if(ui32Status & UART_INT_RX)
{
if (UARTCharsAvail(UART0_BASE))
{
ch = UARTCharGetNonBlocking(UART0_BASE);
DISP_BYTE(_uart0,0,ch);
WriteRingBuffer(_uart0rx,&ch,1);
// while(UARTBusy(UART2_BASE));
// UARTCharPutNonBlocking(UART2_BASE,ch);
// UARTCharPutNonBlocking(UART3_BASE,ch);
// UARTCharPutNonBlocking(UART4_BASE,ch);
// UARTCharPutNonBlocking(UART5_BASE,ch);
// UARTCharPutNonBlocking(UART6_BASE,ch);
// UARTCharPutNonBlocking(UART7_BASE,ch);
}
//check_Rx_data(_uart0);
}
}
void UART1IntHandler(void)
{
uint8_t ch=0xFF;
uint32_t ui32Status;
ui32Status = UARTIntStatus(UART1_BASE, true); //get interrupt status
UARTIntClear(UART1_BASE, ui32Status); //clear the asserted interrupts
if(ui32Status & UART_INT_RX)
{
if (UARTCharsAvail(UART1_BASE))
{
ch = UARTCharGetNonBlocking(UART1_BASE);
DISP_BYTE(_uart1,0,ch);
WriteRingBuffer(_uart1rx,&ch,1);
// UARTCharPutNonBlocking(UART2_BASE,ch);
// UARTCharPutNonBlocking(UART3_BASE,ch);
// UARTCharPutNonBlocking(UART4_BASE,ch);
// UARTCharPutNonBlocking(UART5_BASE,ch);
// UARTCharPutNonBlocking(UART6_BASE,ch);
// UARTCharPutNonBlocking(UART7_BASE,ch);
}
//check_Rx_data(_uart1);
}
}
void UART2IntHandler(void)
{
uint8_t ch=0xFF;
uint32_t ui32Status;
ui32Status = UARTIntStatus(UART2_BASE, true); //get interrupt status
UARTIntClear(UART2_BASE, ui32Status); //clear the asserted interrupts
if(ui32Status & UART_INT_RX)
{
if (UARTCharsAvail(UART2_BASE))
{
ch = UARTCharGetNonBlocking(UART2_BASE);
DISP_BYTE(_uart2,0,ch);
WriteRingBuffer(_uart2rx,&ch,1);
// while(UARTBusy(UART0_BASE));
// UARTCharPutNonBlocking(UART0_BASE,ch);
// while(UARTBusy(UART1_BASE));
// UARTCharPutNonBlocking(UART1_BASE,ch);
}
}
}