Hi TI,
i AM using tm4c1230 series controller i want inter face with lmp90100 AFE ,ssi communication i configured but am not getting how to give ura address someone can help me
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi TI,
i AM using tm4c1230 series controller i want inter face with lmp90100 AFE ,ssi communication i configured but am not getting how to give ura address someone can help me
Hello Vijay
If you go through the LMP90100 AFE device data sheet, there are 2 topologies of the connecting the device to a uC like TM4C. Have you first decided on which topology you would be interfacing with because that would have an influence in the software development.
Looking forward for a more promising answer, where the HW topology is better fixed.
Regards
Amit
Hi amit,
am not getting wt ur telling in data sheet they given 2 transaction , in this am not understanding how to communicate with lmp90100
Hello Vijay,
Which of the 2 transaction types do you plan to use?
Regards
Amit
Hi amit,
fist of all i want communication should be k means just wan read register default values later and writing to registers
Hello Vijaykumar,
As you would have notices that a read to the register requires 3 + N bytes.
The 1st byte is for Instruction-1 which would be 0x10 for read
The 2nd byte is for the URA which would come from the register map
The 3rd byte is for Instruction-2 which would be 0xA (in upper nibble for read one byte) and address in the next nibble.
The N byte in this case would be 1 as we are reading only one byte.
Since the SSI module only gives upto 16 bits (in this case the transaction is 32 bits), between CS, you would need to convert CS pin as a GPIO which would allow you to shift in/out longer bit streams.
You can use the SSI Example from the TIVAware with a change that FSS will be a GPIO driven 1 and only when doing a transaction it will be made 0.
Also SSI works like a serial out and serial in at the same time. So when you write a byte, you read a byte as well. To write a high level code
SSIConfiguration(baud rate,...)
AssertCSGPIOLow
for(i=0;i<4;i++) {
SSIWriteData
wait for SSIBUSY to become 0
SSIReadData
}
AssertCSGPIOHigh
Regards
Amit
Hi Amit ,
Thanks for ur reply,
In code i configures AS SHOWN BELOW
int main(){
unsigned int pui32DataTx[NUM_SSI_DATA];
unsigned int pui32DataRx[NUM_SSI_DATA];
unsigned int ui32Index=0;
unsigned char dtah;
ROM_FPULazyStackingEnable();
ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_8MHZ);
RS232Init(9600);
SPIInit();
UARTprintf("LMP10900 spi \n");
//pui32DataRx[0]=(char)0x90;
dtah=0x83 & 0x70;
while(ROM_SSIDataGetNonBlocking(SSI2_BASE, &pui32DataRx[0]))
{
}
pui32DataTx[0]=(unsigned char)0x10;
ROM_SSIDataPut(SSI2_BASE,0x10);
pui32DataTx[1]=0x02;
ROM_SSIDataPut(SSI2_BASE,0x02);
while(ROM_SSIBusy(SSI2_BASE))
{
}
pui32DataTx[2]=(unsigned char)0xA4;
ROM_SSIDataPut(SSI2_BASE,pui32DataTx[2]);
while(ROM_SSIBusy(SSI2_BASE))
{
}
for(ui32Index=0;ui32Index<=2;ui32Index++){
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[ui32Index]);
UARTprintf("Capacitance Value = %X",(unsigned char)pui32DataRx[ui32Index]);
}
while(1){
}
}
void SPIInit(){
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);
ROM_GPIOPinConfigure(GPIO_PB4_SSI2CLK);
ROM_GPIOPinConfigure(GPIO_PB5_SSI2FSS);
ROM_GPIOPinConfigure(GPIO_PB6_SSI2RX);
ROM_GPIOPinConfigure(GPIO_PB7_SSI2TX);
ROM_GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 |
GPIO_PIN_7);
ROM_SSIConfigSetExpClk(SSI2_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, 1000000, 8);
ROM_SSIEnable(SSI2_BASE);
}
AM stucking while sending instruction 0x10;
Amit Ashara said:you would need to convert CS pin as a GPIO which would allow you to shift in/out longer bit streams.
Poster appears not to have paid strict attention to this (necessary) detail...
Poster: "ROM_GPIOPinConfigure(GPIO_PB5_SSI2FSS);"
Hello Vijay,
As I mentioned earlier:
1. Do not use the FSS/CS from the SSI as it will send 8-bits and deassert the CS which will cause issue. Instead configure the FSS/CS pin as a GPIO and before transmitting the N bytes make it low and after completion of transfer make it 1.
2. You are writing the data to the array and then writing it to the SSIDR. Why two operations for 0x10 and 0x02 data bytes
3. What do you mean by stuck at instruction 0x10? Please elaborate: is it stuck in the SSIBusy llop?
Regards
Amit
HI amit
Thanks amit
actually i used array name in fun call , after i assigned direct value, i changed it now,
i ill use gpio pin as fss and i ill try thanks
Hi amit,
As per ur instructions, i am using gpio pin as cs/fss , am making low it while sending instrction1, ura, inst2,
after that i am reading two bytes little bit confusion with inst1, inst2, in reading and writing i ill past my code below
int main(){
unsigned int pui32DataTx[NUM_SSI_DATA];
unsigned int pui32DataRx[NUM_SSI_DATA];
unsigned int ui32Index=0;
unsigned char dtah;
ROM_FPULazyStackingEnable();
ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_8MHZ);
RS232Init(9600);
SPIInit();
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00);
delay(10);
UARTprintf("LMP10900 spi \n");
//pui32DataRx[0]=(char)0x90;
dtah=0x83 & 0x70;
while(ROM_SSIDataGetNonBlocking(SSI2_BASE, &pui32DataRx[0]))
{
}
pui32DataTx[0]=(unsigned char)0x90;
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00);
while(ROM_SSIBusy(SSI2_BASE))
{
}
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0xFF);
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00);
ROM_SSIDataPut(SSI2_BASE,pui32DataTx[0]);
while(ROM_SSIBusy(SSI2_BASE))
{
}
pui32DataTx[1]=(unsigned char)0x02;
ROM_SSIDataPut(SSI2_BASE,pui32DataTx[1]);
while(ROM_SSIBusy(SSI2_BASE))
{
}
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0xFF);
// ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00);
pui32DataTx[2]=(unsigned char)0xA4;
ROM_SSIDataPut(SSI2_BASE,pui32DataTx[2]);
while(ROM_SSIBusy(SSI2_BASE))
{
}
// ROM_SSIDataPut(SSI2_BASE,pui32DataTx[2]);
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0xff);
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00);
for(ui32Index=0;ui32Index<=2;ui32Index++){
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[ui32Index]);
pui32DataRx[ui32Index] &= 0x00FF;
UARTprintf("Capacitance Value = %d",pui32DataRx[ui32Index]);
UARTprintf("\nLMP10900 END \n");
while(ROM_SSIBusy(SSI2_BASE))
{
}
}
//UARTprintf("LMP10900 END \n");
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0xff);
while(1){
}
}
Hello Vijaykumar,
I do not get what exactly is the issue. Can you be more specific?
Regards
Amit
#include <stdint.h>
#include <stdio.h>
#include <stdbool.h>
#include <string.h>
#include "inc/hw_ints.h"
#include "inc/hw_types.h"
#include "driverlib/rom.h"
#include "driverlib/pin_map.h"
#include "inc/hw_memmap.h"
#include "inc/hw_sysctl.h"
#include "driverlib/debug.h"
#include "driverlib/timer.h"
#include "driverlib/sysctl.h"
#include "driverlib/systick.h"
#include "driverlib/pin_map.h"
#include "driverlib/gpio.h"
#include "driverlib/uart.h"
#include "driverlib/ssi.h"
#include "inc/hw_gpio.h"
#include "uartstdio.h"
#define NUM_SSI_DATA 20
void RS232Init(unsigned long ulBaudRate);
void SPIInit();
void delay(unsigned long ms)
{
unsigned long i = 0, j = 0;
for(i = 0; i<ms;i++)
{
for(j = 0;j<3000;j++);
}
}
int main(){
unsigned int pui32DataTx[NUM_SSI_DATA];
unsigned int pui32DataRx[NUM_SSI_DATA];
unsigned int ui32Index=0;
unsigned char dtah;
ROM_FPULazyStackingEnable();
ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_8MHZ);
RS232Init(9600);
SPIInit();
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00);
delay(10);
UARTprintf("LMP10900 spi \n");
//pui32DataRx[0]=(char)0x90;
dtah=0x83 & 0x70;
while(ROM_SSIDataGetNonBlocking(SSI2_BASE, &pui32DataRx[0]))
{
}
pui32DataTx[0]=(unsigned char)0x10;
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00);
while(ROM_SSIBusy(SSI2_BASE))
{
}
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0xFF);
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00);
ROM_SSIDataPut(SSI2_BASE,pui32DataTx[0]);
while(ROM_SSIBusy(SSI2_BASE))
{
}
pui32DataTx[1]=(unsigned char)0x02;
ROM_SSIDataPut(SSI2_BASE,pui32DataTx[1]);
while(ROM_SSIBusy(SSI2_BASE))
{
}
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0xFF);
// ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00);
pui32DataTx[2]=(unsigned char)0xA4;
ROM_SSIDataPut(SSI2_BASE,pui32DataTx[2]);
while(ROM_SSIBusy(SSI2_BASE))
{
}
// ROM_SSIDataPut(SSI2_BASE,pui32DataTx[2]);
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0xff);
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00);
for(ui32Index=0;ui32Index<=2;ui32Index++){
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[ui32Index]);
pui32DataRx[ui32Index] &= 0x00FF;
UARTprintf("Capacitance Value = %d",pui32DataRx[ui32Index]);
UARTprintf("\nLMP10900 END \n");
while(ROM_SSIBusy(SSI2_BASE))
{
}
}
//UARTprintf("LMP10900 END \n");
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0xff);
while(1){
}
}
void SPIInit(){
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);
ROM_GPIOPinConfigure(GPIO_PB4_SSI2CLK);
//ROM_GPIOPinConfigure(GPIO_PB5_SSI2FSS);
ROM_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE,GPIO_PIN_5);
ROM_GPIOPinConfigure(GPIO_PB6_SSI2RX);
ROM_GPIOPinConfigure(GPIO_PB7_SSI2TX);
ROM_GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_6 |
GPIO_PIN_7);
ROM_SSIConfigSetExpClk(SSI2_BASE, ROM_SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, 1000000, 8);
ROM_SSIEnable(SSI2_BASE);
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0xFF);
}
void RS232Init(unsigned long ulBaudRate)
{
// Enable the peripherals used by this example.
//
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
// Set GPIO E0 and E1 as UART pins.
//
ROM_GPIOPinConfigure(GPIO_PA0_U0RX);
ROM_GPIOPinConfigure(GPIO_PA1_U0TX);
ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
ROM_GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1,
GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPU);
//
// Configure the UART for 115,200, 8-N-1 operation.
//
// ROM_UARTConfigSetExpClk(UART0_BASE, ROM_SysCtlClockGet(), ulBaudRate,
// (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
// UART_CONFIG_PAR_NONE));
UARTStdioConfig(0,ulBaudRate,ROM_SysCtlClockGet());
}
in above cod ei am sending 0x10, 0x02, 0xA4, after that am readig bytes but am not able to read am making chip select low at the end of reading
in previous conversion i pasted code in that am making low chip select in init only after that i am making high after read data but am not not reading bytes
Hello Vijay,
The Data Bytes to be transmitted are
0x10 0x02 0xA4 0x00 0x00
So there are 5 bytes to be sent. When you send the 0x00 and 0x00 that is when the data is sent by the LMP device. After that you can make the CS High.
Regards
Amit
Hi,
You need more routines/organization of your software. On the device page, there a number of documents/application notes related to device use. One is important:
http://www.ti.com/lit/an/snaa075a/snaa075a.pdf
Download and read, take care about fig.1, and starting from page 8 you have a template of routines to be written for communication with the device. You need just to re-define some low level routines to fit your micro. And then you need to debug...
Petrei
HI
now changed in code data width 8 to 16 , now also it is not working
u16DataTx=0x91;
u16DataTx= u16DataTx << 8;
u16DataTx |= 0xAF;
ROM_SSIDataPut(SSI2_BASE,u16DataTx);
while(ROM_SSIBusy(SSI2_BASE)){}
//ROM_SSIDataGet(SSI2_BASE, &u16DataRx);
UARTprintf("DATAFROM REGISTER = %d\n",(unsigned short)pui32DataRx[0]);
Hello Vijay
Where is the variable pui32DataRx[0] coming from? Just a code snippet is not all that useful
Regards
Amit
Hi
i was checking in Logic analyzer i am not getting clock pulse
the spi initialization is
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);
ROM_GPIOPinConfigure(GPIO_PB4_SSI2CLK);
//ROM_GPIOPinConfigure(GPIO_PB5_SSI2FSS);
ROM_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE,GPIO_PIN_5);// chip select is configured as a out put pin,
ROM_GPIOPinConfigure(GPIO_PB6_SSI2RX);
ROM_GPIOPinConfigure(GPIO_PB7_SSI2TX);
ROM_GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_6 |
GPIO_PIN_7);
ROM_SSIConfigSetExpClk(SSI2_BASE, ROM_SysCtlClockGet(), SSI_FRF_MOTO_MODE_1,
SSI_MODE_MASTER, ROM_SysCtlClockGet()/8, 16);
ROM_SSIEnable(SSI2_BASE);
Hi
due to other work i didn't completed this project sorry for inconvenience.
Hello Vijay,
Please note that the CS would be 0 and SSI requires in an inactive state the CS be 1.
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,GPIO_PIN_5);
ROM_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE,GPIO_PIN_5);
Then when doing the transaction make sure that the CS pin value is 0 and only after completing the transaction the CS is made back 1.
Regards
Amit
hello Amit,
I did that CS low When I want to send data from Controller , i ill past the code of sending and reading data , Actually I made CS Pin Low always
u16DataTx=0x11;
u16DataTx= u16DataTx << 8;
u16DataTx |= 0xAF;
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_SSIDataPut(SSI2_BASE,u16DataTx);
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_SSIDataGet(SSI2_BASE, &u16DataRx);
//u16DataRx = u16DataRx >> 8;
UARTprintf("DATAFROM REGISTER = %d\n",u16DataRx);
Hello Vijay
Not a good idea. The CS "must" toggle 1-0-1 for a valid transaction as slave devices use this as an information for loading shift registers
Regards
Amit
Hi Amit,
In LMP90100 have option to CS make it ground transaction is not depending on this signal,
Hi Amit,
I was CS Pin Asserting a& Deserting as you told, that's fine, i am able to generate clock, cs pin making asserting, deserting, and SDO pin is Showing same thing what were CS pin Do , k fine what about SDI pin its nothing Showing on analyzer
Hi Amit
The Code what were i pasted here, in this the clock is generating for only two bytes, for data put, and clock was not generating for data get instruction, the image i attached here is for for one data put instruction ,and it is same for 2nd data also . but its not comming for data get instruction, D0 is clock, D1 is Chip Select, D2 is SDO, D3 is SDI
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00); //cs make it low
pui32DataTx[0]=0x11; // read register
//pui32DataTx[1]=0x01; // ura
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_SSIDataPut(SSI2_BASE,pui32DataTx[0]);
pui32DataTx[1]=0xAF; // read +2 bytes+LRA
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_SSIDataPut(SSI2_BASE,pui32DataTx[1]);
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[0]);
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,GPIO_PIN_5); //cs make disable(high)
UARTprintf("DATAFROM REGISTER = %d\n",pui32DataRx[0]);
Hello Vijay,
The way SSI legacy mode in TM4C devices work, is that to get a byte you need to put a byte. So in this case when you want to 3 transactions, you need to SSIDataPut 3 times. and each time you do you have to SSIDataGet to Flush the RXFIFO. During the Byte 1-2 SSIDataPut, the SSIDataGet is to flush the RXFIFO. The Byte-3 SSIDataPut can be a dummy byte like 0x0 but the SSIDataGet would be the actual data from the Slave.
Thanks for the larger code and scope snapshot. That was helpful in understanding the issue better.
Regards
Amit
Hello Vijay,
Sure. Do post us success or failure... It is valuable to have data back as future reference.
Regards
Amit
Hi Amit ,
Thanks , sorry for gap,
as per your instruction i was doing flushing buffers but am not getting written data from registers, getting always zero
I refered MSP430 Code and heder files
///write data instructions
reg_write_data = TI_LMP90100_SPI_DRDYBCN_REG_VALUE; //0x83
new_URA=(TI_LMP90100_SPI_DRDYBCN_REG & LMP90100_URA_MASK)>>4; // (0x11 & 0x70)>>4
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00); //cs make it low
//if (prev_URA != new_URA) // if new and previous URA not same, add transaction 1
//{
inst = LMP90100_INSTRUCTION_BYTE1_WRITE; // Transaction-1 //0x10
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,inst); // Send instruction //0x10
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,new_URA); // Send upper register address // 0x01
prev_URA = new_URA; // save new URA
//}
inst = LMP90100_WRITE_BIT | LMP90100_SIZE_1B |(TI_LMP90100_SPI_DRDYBCN_REG & LMP90100_LRA_MASK);
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,inst); // send lower register address //0x01
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,reg_write_data); // Send data value //0x83;
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[0]); // dummy get data
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,GPIO_PIN_5); //cs make it high
read instructions
/********************************************************************************************************************************/
delay(200);
new_URA = (TI_LMP90100_SPI_DRDYBCN_REG & LMP90100_URA_MASK)>>4; // extract upper register address
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00); //cs make it low
inst = LMP90100_INSTRUCTION_BYTE1_WRITE; // Transaction-1
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,inst); // Send instruction
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[1]); // dummy get data
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,new_URA); // Send upper register address
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[2]); // dummy get daata
prev_URA = new_URA; // save new URA
inst = LMP90100_READ_BIT | LMP90100_SIZE_1B | (TI_LMP90100_SPI_DRDYBCN_REG & LMP90100_LRA_MASK); // Transaction-2
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,inst); // Send lower register address // lower address with inst2
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[2]); // dummy get data
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,0x00); // Dummy write so we can read data // dummy byte write
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[3]);
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
ROM_SSIDataGet(SSI2_BASE, &u16DataRx); // Read data // get data
//while(ROM_SSIDataGetNonBlocking(SSI2_BASE, &u16DataRx))
while(ROM_SSIBusy(SSI2_BASE)){}
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,GPIO_PIN_5); //cs make it high
UARTprintf(" \n\r %d",u16DataRx);
as per above code i aam getting always zero from read data
Amit Ashara said:It is valuable to have data back as future reference.
Really - have not (most) readers' eyes long glazed over?
While we wish this poster well - should not (some) consideration be given to a, "Forum Slaughter Rule?" (in many sports - when the score becomes 30 - 0 - it's time to, "pull the plug!") (DNR in medical terms)
Cannot (should not) poster apply a, "Self-Awarded" Verify Answer (any of his code dumps) and "claim victory" - much as our politicos do?
We (long) note that KISS has completely escaped this thread - poster has started (and remained) with an admittedly challenging SPI device. (and poster is revealed as new to SPI and/or this MCU's handling of SPI)
Might I suggest that poster turn his attention to low-cost, smallest, most basic SPI-based EEProm - and master the fundamentals of SPI writes/reads w/that far simpler device? Armed w/that success - as Petrei past suggested - (ONLY THEN) return - and attack this far more complex device systematically - one small step at a time...
Or - another series of, "color sprinkled" code dumps will arrive - with not one bit of usable SPI slave data... Suspect the value of this thread as, "future reference" is questionable - and such was (long ago) easily predicted...
HI amit,
That is inst & inst1 are same for your understand i written like , i mentioned in code inst is tranction 1 and new_ura is second instruction, , in reading code Ui32Index=0x90 is instruction 1 and tranction 2 is new_ura
HI amit
I am able to see in logic analyzer only data put clock pulses , for data get instruction am not getting any clock pulses
Hi Amit,
Thanks For Supporting to me, now spi is working fine ,due to mode of communication and clock frequency i didn't got slave out put (MISO) data i pasted here working code refer the header files TI_LMP90100.h ,TI_LMP90100_register_settings.h for register #defines you will get these header files from ti site
#include <stdint.h>
#include <stdio.h>
#include <stdbool.h>
#include <string.h>
#include "inc/hw_ints.h"
#include "inc/hw_types.h"
#include "driverlib/rom.h"
#include "driverlib/pin_map.h"
#include "inc/hw_memmap.h"
#include "inc/hw_sysctl.h"
#include "driverlib/debug.h"
#include "driverlib/timer.h"
#include "driverlib/sysctl.h"
#include "driverlib/systick.h"
#include "driverlib/pin_map.h"
#include "driverlib/gpio.h"
#include "driverlib/uart.h"
#include "driverlib/ssi.h"
#include "inc/hw_gpio.h"
#include "uartstdio.h"
#include "TI_LMP90100.h"
#include "TI_LMP90100_register_settings.h"
#define NUM_SSI_DATA 20
void RS232Init(unsigned long ulBaudRate);
void SPIInit();
void delay(unsigned long ms)
{
while(ms--);
}
unsigned int pui32DataTx[NUM_SSI_DATA]={0};
unsigned short int u16DataTx=0;
unsigned int u16DataRx=0,u16DataRx2=0;
unsigned char prev_URA;
unsigned char reg_write_data, reg_read_data;
unsigned char new_URA, inst , ui32Index=0;
unsigned int pui32DataRx[NUM_SSI_DATA]={0};
int main(){
//unsigned int
ROM_FPULazyStackingEnable();
ROM_SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_8MHZ);
RS232Init(9600);
SPIInit();
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,GPIO_PIN_5); //cs make it high
while(1){
prev_URA = LMP90100_URA_END;
reg_write_data = TI_LMP90100_SPI_DRDYBCN_REG_VALUE;
new_URA=(TI_LMP90100_ADC_AUXCN_REG & LMP90100_URA_MASK)>>4;
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00); //cs make it low
inst = LMP90100_INSTRUCTION_BYTE1_WRITE; // Transaction-1
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,inst); // Send instruction
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
ROM_SSIDataGet(SSI2_BASE, &pui32DataTx[0]);
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,new_URA); // Send upper register address
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
ROM_SSIDataGet(SSI2_BASE, &pui32DataTx[1]);
//prev_URA = new_URA; // save new URA
inst = LMP90100_WRITE_BIT | LMP90100_SIZE_1B |(TI_LMP90100_ADC_AUXCN_REG & LMP90100_LRA_MASK);
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,inst); // send lower register address
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
ROM_SSIDataGet(SSI2_BASE, &pui32DataTx[2]);
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,reg_write_data); // Send data value
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,GPIO_PIN_5); //cs make it high*/
/********************************************************************************************************************************/
//reg_read_data = TI_LMP90100_SPIReadReg(TI_LMP90100_SPI_DRDYBCN_REG,
// &prev_URA); // Read back the value written
delay(20);
new_URA = (TI_LMP90100_ADC_AUXCN_REG & LMP90100_URA_MASK)>>4; // extract upper register address
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,0x00); //cs make it low
//if (LMP90100_URA_END != new_URA) // if new and previous URA not same, add transaction 1
//{
//inst
inst =LMP90100_INSTRUCTION_BYTE1_WRITE; // Transaction-1
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,inst ); // Send instruction
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[0]);
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,new_URA); // Send upper register address
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[1]);
//prev_URA = new_URA; // save new URA
//}
inst = LMP90100_READ_BIT | LMP90100_SIZE_1B | (TI_LMP90100_ADC_AUXCN_REG & LMP90100_LRA_MASK); // Transaction-2
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,inst); // Send lower register address
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[2]);
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TXBUF ready
ROM_SSIDataPut(SSI2_BASE,0x00); // Dummy write so we can read data
// delay(1);
while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
ROM_SSIDataGet(SSI2_BASE, &pui32DataRx[3]);
//while(ROM_SSIBusy(SSI2_BASE)){} // Wait for TX complete
//ROM_SSIDataGet(SSI2_BASE, &u16DataRx); // Read data
u16DataRx2 =u16DataRx>>8;
//UARTprintf(" \n\r %x",pui32DataRx[3]);
ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,GPIO_PIN_5); //cs make it high
//delay(100);
}
////////////////////////////////////////////// SPI Init fun////////////////////////////////////////
}
void SPIInit(){
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);
ROM_GPIOPinConfigure(GPIO_PB4_SSI2CLK);
//ROM_GPIOPinConfigure(GPIO_PB5_SSI2FSS);
ROM_GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE,GPIO_PIN_5);// chip select is configured as a out put pin,
ROM_GPIOPinConfigure(GPIO_PB6_SSI2RX);
ROM_GPIOPinConfigure(GPIO_PB7_SSI2TX);
ROM_GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_6 |
GPIO_PIN_7);
ROM_SSIClockSourceSet(SSI2_BASE, SSI_CLOCK_SYSTEM);
ROM_SSIConfigSetExpClk(SSI2_BASE, ROM_SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, 125000, 8);
ROM_SSIEnable(SSI2_BASE);
//ROM_GPIOPinWrite(GPIO_PORTB_BASE,GPIO_PIN_5,GPIO_PIN_5);
}
HI Amit,
At fist time due hardware mistake, i did not got output from slave , after that i make sure hardware connections correct, in that time i was using SysCtlClockGet()/8, i am using oscillater of 8MHZ for controller , due to confusion i checked with all modes mode1, mode2, mode3 ,mode0, TI mode, after that i used always ti mode in that time i am getting data from slave but it is not actual data after i didnot changed , i did not concentrated on mode of configuration, once more time go through the code in that time i checked by changing clock and mode by giving 100khz and 125khz, in mode0 i am geting out put from slave but 0th bit of the slave output is missing, in LMP datasheet i confused with modes . data is capturing in falling edge so due to confusion i did wrong ,now i configured SCLK 125KHZ, and Mode1 so now it is working
Thanks & regards
vijay
vijaykumar sajjan said:as it is mentioned in data sheet of LMP its working fine up to 10MHZ, but i have AArdavark spi/i2c host for checking communication and responce from slaves (total phase spi/i2c) in that we can set sclk up to 8MHZ in that also its communicating with 125khz, if i gave more then 125khz its not giving any exact default values of resisters
Hey I read this thread .. crazy thread and I can understand friend CB1 "well ending" and how much can be useless... So it got very loooooooooong with SPI and now?? Appear as using I2C mode? But Amit, when we can have a good forum for real TIVA issue and not television serial or TV novel like these???
Resistor pullup on I2C depend on capacitive load.. but reading specification of I2C and data sheet too?