Shadow Flags, register ESMSR2.

Hello Francisco,

Consider each of the three ESM groups:

ESM group1 errors are "minor errors" and can be handled by the application by enabling interrupt generation for the errors relevant to an application. Errors in group1 that are deemed critical and which require signaling to external safety companion (e.g. TPS65381) can also be configured to drive the nERROR terminal.

ESM group3 errors are very critical and application code execution may not be reliable when either of these errors occurs. These errors always drive the nERROR terminal low so that the external safety companion can query the MCU and put it in the defined safe state, if required. The CPU takes an abort exception for most of these errors (except for eFuse autoload error) and this is a precise abort. The CPU can query its own fault status and address registers to determine the cause of the error.

ESM group2 errors are also fairly critical errors, but these do not cause a precise abort exception. The CPU must first respond to the non-maskable interrupt request generated by these errors. Also, the nERROR terminal is driven to indicate these errors to the safety companion circuit. The external safety companion can choose to assert system reset on the MCU to try and restart it. In this case the ESM group2 status register will get cleared. The NMI handler can read the shadow register in this case to identify the cause of the group2 error.

Hope this helps.

Regards, Sunil