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Tiva SSI 24 bit frame size to a PLL

Other Parts Discussed in Thread: TM4C123GH6PM

Maybe I'm missing something from my initial look at the data sheet, but I don't see how to write a 24 bit frame size using SPI with SS wrapped around it. Is this possible? I want to use DMA to transfer a ramp table to a PLL and at the same time trigger DMA sampling of the on-board ADC.

  • Hello Chris

    Which TIVA device are you using?

    Regards

    Amit

  • Device is TM4C123GH6PM

  • Hello Chris,

    Can you clarify what "SS wrapped around it"? Sorry for being naive but sometimes Acronyms bounces right of me.

    What you are looking for is possible. The uDMA will not access both resources at the same time. What needs to be done is

    1. Set up a timer to generate a uDMA Trigger and ADC Conversion Trigger

    2. Set up the ADC to do a conversion and then generate a uDMA Request

    3. The uDMA Transfers the data from ADC to internal memory

    4. The uDMA for SSI transfer would need to use the Peripheral Scatter Gather method to set the GPIO for CS low, then write 3 bytes (since we do not have a 24-bit mode for SSI) and make CS high after that

    5. The CPU after completion of the above transfers then flushes the SSI RX FIFO

    6. The operation from Step-1 to 5 begins again.

    Regards

    Amit