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TM4C129 Emac Descriptor usage



Hi,

DES1 is described as a register that holds the "size of the buffer attached to the descriptor"


But I want to receive Ethernet data from the Ethernet driver to a specific location in RAM (not know in advance). Can I do that, or I HAVE to uDMA the data to a pre-allocated memory and then copy the data to its final destination?

thanks.

Khaled.

  • Hello Khaled

    The Ethernet itslef transfers the data based on the programming of the Descriptor to the SRAM. So you do not need to use a uDMA to copy the data.

    Regards

    Amit

  • But from Tiva ware example code , it seems that the descriptor feilds has to be filled ahead of time (at initialization)!

    What I need is: wait an incomming Ethernet packet, when the packet is in the RX FIFO an ISR is triggerd. AT THIS POINT, I will allocate the memory and fill the desciptor fields and then uDMA can transfer the data to its final location.

    Is that possible?

    Thanks.

    Khaled.

  • Hello Khaled

    I am not sure and I have not tried it, but I do not think so it would be possible it to do so this way. May be folks on the forum may have done so and can comment better.

    Regards

    Amit

  • Amit,

    I checked the forum and found nothing on this subject.

    I have to change my approach.

    Can I use multiple buffers to save the data? in other words, can each descriptor point to a buffer? that way multiple packets can be stored.

    If yes, do you have an example code that shows buffers alignment, Own bit usage... ?

    thanks.

    Khaled.

  • Hello Khaled,

    I won't be having a low level ethernet code that I would be able to share. I will notify some forum members.

    Regards

    Amit

  • I have not tried this before either.  However, I think it could be possible.

    First and foremost, As a general rule i do not encourage dynamic memory allocation on Tiva class systems.  For those coming down to MCU class devices from higher end processors this seems strange but when doing real time the memory allocation and garbage collection complicate things significantly.  If a static allocation solution exists for your application i encourage you to pursue that first.

    Here is how i might approach your issue...

    1) The Ethernet MAC ISR fires and tells you that packet is ready.  In the interrupt routine DO NOT ALLOCATE MEMORY.  Set a flag and let code in application context do the allocation.

    2) Application code reads the flag.  Allocates the buffer on the heap.  

    3) application code verifies successful memory allocation.  Then set up a SW uDMA transfer from the MAC data registers to the new memory location.  Optionally setup a uDMA complete interrupt.  

    4) By interrupt or polling wait for the uDMA transfer to complete.  When complete you have the data in your new buffer and ready for use.

    I think because of your need for dynamic allocation you may not be able to take full advantage of the hardware peripheral DMA opportunities.

  • Thanks Dexter,

    What you suggest is very close to the Cortex-M3 solution that I used before.

    Now that I have migrated to the Cortex-M4 TM4C129, it seems that I have to use descriptors.

    Amit (TI's Engineer) reply, more or less, tells me that the descriptors should be initialized and pointing to pre-allocated memory BEFORE they can be used!

    Amit: "I am not sure and I have not tried it, but I do not think so it would be possible it to do so this way. May be folks on the forum may have done so and can comment better".

    As such, I have to find a solution that does not use dynamic allocation on a packet per packet basis.

    My question still stands: can I use multiple descriptor with each one pointing to a separate receive buffer? and If yes, I would like to have an example code that shows buffers alignment, Own bit usage....

    this way, I can receive multiple packets back to back and process them at a later time.

    Khaled.

  • Have a look at PING PONG DMA methods. This is designed to use two buffers an A and a B buffer.  The hardware switches between the two semi-automatically so that one can be processed by your software while the other is filled by the hardware DMA.

    There used to be an M3 example i don't know if it got transferred to TivaWare M4.  I don't think so.  I don't have StellarisWare installed but it would have been in one of the 9B9x kit directories.

  • Dexter,

    I found the ping pong example code on TivaWare, but its for UART Interface not with Ethernet.

    I'm looking for example code that shows how to use this "Improved Ethernet driver" i.e. "the descriptors" with multi-buffers.

    Khaled.

  • Hello Amit,

    Where you able to find anything? the feed back that I got from the forum was not enough to solve my problem.

    thanks.