Help to get uart bootloader for NON virtual serial port for Tiva launchpad TM4C123G to work

Hi

I got the bootloader in "TivaWare_C_Series-2.1.0.12573" to work with LM flash programmer, BUT only on UART0 (PA0=RX and PA1=TX) with the virtual serial port.

I need to get it to work with a "normal" USB2serial device, but now after alot of testing I have no more ideas on how to proceed.

I got the LAB12 in the TM4C123G_LaunchPad_Workshop (an uart test-app that together with terminal program show that the UART works ) to work on UART1 and UART2 together with 2 different USB2serial (one from Ftdchip.com and another from Arduino.

for UART1:

changes in bl_main.c

diff --git a/boot_loader/bl_main.c b/boot_loader/bl_main.c
index fbb7275..35d1449 100644
--- a/boot_loader/bl_main.c
+++ b/boot_loader/bl_main.c
@@ -264,8 +264,8 @@ ConfigureDevice(void)
//
// Enable the the clocks to the UART and GPIO modules.
//
- HWREG(SYSCTL_RCGC2) |= SYSCTL_RCGC2_GPIOA;
- HWREG(SYSCTL_RCGC1) |= SYSCTL_RCGC1_UART0;
+ HWREG(SYSCTL_RCGC2) |= SYSCTL_RCGC2_GPIOB;
+ HWREG(SYSCTL_RCGC1) |= SYSCTL_RCGC1_UART1;

//
// Keep attempting to sync until we are successful.
@@ -281,28 +281,30 @@ ConfigureDevice(void)
//
// Set GPIO A0 and A1 as UART pins.
//
- HWREG(GPIO_PORTA_BASE + GPIO_O_AFSEL) |= UART_PINS;
+ HWREG(GPIO_PORTB_BASE + GPIO_O_AFSEL) |= UART_PINS;

//
// Set the pin type.
//
- HWREG(GPIO_PORTA_BASE + GPIO_O_DEN) |= UART_PINS;
+ HWREG(GPIO_PORTB_BASE + GPIO_O_DEN) |= UART_PINS;

//
// Set the baud rate.
//
- HWREG(UART0_BASE + UART_O_IBRD) = ui32ProcRatio >> 6;
- HWREG(UART0_BASE + UART_O_FBRD) = ui32ProcRatio & UART_FBRD_DIVFRAC_M;
+// HWREG(UART1_BASE + UART_O_IBRD) = ui32ProcRatio >> 6;
+// HWREG(UART1_BASE + UART_O_FBRD) = ui32ProcRatio & UART_FBRD_DIVFRAC_M;
+ HWREG(UART1_BASE + UART_O_IBRD) = 0x1B;
+ HWREG(UART1_BASE + UART_O_FBRD) = 0x08;

//
// Set data length, parity, and number of stop bits to 8-N-1.
//
- HWREG(UART0_BASE + UART_O_LCRH) = UART_LCRH_WLEN_8 | UART_LCRH_FEN;
+ HWREG(UART1_BASE + UART_O_LCRH) = UART_LCRH_WLEN_8 | UART_LCRH_FEN;

//
// Enable RX, TX, and the UART.
//
- HWREG(UART0_BASE + UART_O_CTL) = (UART_CTL_UARTEN | UART_CTL_TXE |
+ HWREG(UART1_BASE + UART_O_CTL) = (UART_CTL_UARTEN | UART_CTL_TXE |
UART_CTL_RXE);

#ifdef UART_AUTOBAUD
@@ -606,8 +608,8 @@ Updater(void)
HWREG(SYSCTL_SRCR1) = SYSCTL_SRCR1_I2C0;
#endif
#ifdef UART_ENABLE_UPDATE
- HWREG(SYSCTL_RCGC1) &= ~SYSCTL_RCGC1_UART0;
- HWREG(SYSCTL_SRCR1) = SYSCTL_SRCR1_UART0;
+ HWREG(SYSCTL_RCGC1) &= ~SYSCTL_RCGC1_UART1;
+ HWREG(SYSCTL_SRCR1) = SYSCTL_SRCR1_UART1;
#endif

for changes in bl_uart.c

diff --git a/boot_loader/bl_uart.c b/boot_loader/bl_uart.c
index 71df5c3..5b87d9b 100644
--- a/boot_loader/bl_uart.c
+++ b/boot_loader/bl_uart.c
@@ -65,14 +65,14 @@ UARTSend(const uint8_t *pui8Data, uint32_t ui32Size)
//
// Make sure that the transmit FIFO is not full.
//
- while((HWREG(UART0_BASE + UART_O_FR) & UART_FR_TXFF))
+ while((HWREG(UART1_BASE + UART_O_FR) & UART_FR_TXFF))
{
}

//
// Send out the next byte.
//
- HWREG(UART0_BASE + UART_O_DR) = *pui8Data++;
+ HWREG(UART1_BASE + UART_O_DR) = *pui8Data++;
}

//
@@ -98,14 +98,14 @@ UARTFlush(void)
// Wait for the UART FIFO to empty and then wait for the shifter to get the
// bytes out the port.
//
- while(!(HWREG(UART0_BASE + UART_O_FR) & UART_FR_TXFE))
+ while(!(HWREG(UART1_BASE + UART_O_FR) & UART_FR_TXFE))
{
}

//
// Wait for the FIFO to not be busy so that the shifter completes.
//
- while((HWREG(UART0_BASE + UART_O_FR) & UART_FR_BUSY))
+ while((HWREG(UART1_BASE + UART_O_FR) & UART_FR_BUSY))
{
}
}
@@ -136,14 +136,14 @@ UARTReceive(uint8_t *pui8Data, uint32_t ui32Size)
//
// Wait for the FIFO to not be empty.
//
- while((HWREG(UART0_BASE + UART_O_FR) & UART_FR_RXFE))
+ while((HWREG(UART1_BASE + UART_O_FR) & UART_FR_RXFE))
{
}

//
// Receive a byte from the UART.
//
- *pui8Data++ = HWREG(UART0_BASE + UART_O_DR);
+ *pui8Data++ = HWREG(UART1_BASE + UART_O_DR);
}
}

Very grateful for help on this

Anders