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Actual spi clock speed doesn't match halcogen value

David Sabol
Genius 4850 points
Other Parts Discussed in Thread: HALCOGEN, TMS570LS0332

Hi,

I'm using CCS5.5, TMS570LS0332 and Halcogen 4.0.

 

I've set up SPI1 to have a baudrate of 1000kHz.  However, the measured frequency is around 117kHz.  I verified that if I drop the speed in Halcogen in half, the measured frequency drops in half as well.

 

What could cause the actual frequency not to match what it should? Is there some configuration I may have missed?

 

Thanks,
David

  • 0
    TI__Mastermind 22375 points

    David,

    Are you using the project you shared with me?
    I will check by running your code as soon as possible.

    By the way, which hardware board are you using?
    Can you check the value of the external crystal.

    Halcogen by default is doing all the speed calculation based on an external crystal of 16Mhz and setup the CPU and Peripheral clock to the maximum value (as specified for a given device)
    In your case (TMS570LS0332) the CPU clock will be set to 80Mhz and VCLK1 (used by MIBPSI/SPI) to 80Mhz.
    This explain the value 79 + 1  in the prescaler for the SPI1 config to achieve 1Mbps.

  • 0 in reply to Jean-Marc Mifsud
    Genius 4850 points

    I modified the project so that it is using SPI in standard mode instead of the multi buffer mode.

     

    The board I am using is one designed by my company.  It looks like the external crystal is at 16.384 MHz.

    For what it's worth, when I was trying to use it in multi buffer mode yesterday the measured clock speed matched halcogen.

    EDIT: The clock speed is accurate again..I don't know why it wasn't for a while.

  • 0 in reply to David Sabol
    TI__Mastermind 22375 points

    David,


    You said that the measured baudrate is 117Kbps
    Assuming that all prescaler are correct (79 + 1) for SPI1 that means VCLK1 = ~9.4Mhz.

    This could be the backup HFLPO clock. This backup clock is in use in case of external oscillator failure.
    The PLL is no more use and the device will run at this backup frequency.

    Can you check bit0 of GLBSTAT at address 0xFFFF_FFEC and let me know.

    This theory does not explain why it was working in MIBSPI mode, unless there is a problem on your external crystal and yesterday was a lucky day.

    Please let me know.

  • 0 in reply to Jean-Marc Mifsud
    Genius 4850 points

    The GLBSTAT register is all 0's.

     

    I'm not sure why it is working now, but I will keep an eye on it.

     

    Thanks