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How to get to the right registers

Other Parts Discussed in Thread: TM4C123GH6PM

Greetings, i have found some code, configuring SSI0 module on PA ports, but i need to change it for SSI1 module on the PF ports of the TM4C123H6PMI launchpad.

SYSCTL_RCGC1_R |= SYSCTL_RCGC1_SSI0; // activate SSI0
SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOA; // activate port A
delay = SYSCTL_RCGC2_R; // allow time to finish activating
GPIO_PORTA_DIR_R |= 0xC0; // make PA6,7 out
GPIO_PORTA_AFSEL_R |= 0x2C; // enable alt funct on PA2,3,5
GPIO_PORTA_AFSEL_R &= ~0xC0; // disable alt funct on PA6,7
GPIO_PORTA_DEN_R |= 0xEC; // enable digital I/O on PA2,3,5,6,7
// configure PA2,3,5 as SSI
GPIO_PORTA_PCTL_R = (GPIO_PORTA_PCTL_R&0xFF0F00FF)+0x00202200;
// configure PA6,7 as GPIO
GPIO_PORTA_PCTL_R = (GPIO_PORTA_PCTL_R&0x00FFFFFF)+0x00000000;
GPIO_PORTA_AMSEL_R &= ~0xEC; // disable analog functionality on PA2,3,5,6,7
SSI0_CR1_R &= ~SSI_CR1_SSE; // disable SSI
SSI0_CR1_R &= ~SSI_CR1_MS; // master mode
// configure for system clock/PLL baud clock source
SSI0_CC_R = (SSI0_CC_R&~SSI_CC_CS_M)+SSI_CC_CS_SYSPLL;
// clock divider for 3.33 MHz SSIClk (80 MHz PLL/24)
// SysClk/(CPSDVSR*(1+SCR))
// 80/(24*(1+0)) = 3.33 MHz (slower than 4 MHz)
SSI0_CPSR_R = (SSI0_CPSR_R&~SSI_CPSR_CPSDVSR_M)+24; // must be even number
SSI0_CR0_R &= ~(SSI_CR0_SCR_M | // SCR = 0 (3.33 Mbps data rate)
SSI_CR0_SPH | // SPH = 0
SSI_CR0_SPO); // SPO = 0
// FRF = Freescale format
SSI0_CR0_R = (SSI0_CR0_R&~SSI_CR0_FRF_M)+SSI_CR0_FRF_MOTO;
// DSS = 8-bit data
SSI0_CR0_R = (SSI0_CR0_R&~SSI_CR0_DSS_M)+SSI_CR0_DSS_8;
SSI0_CR1_R |= SSI_CR1_SSE; // enable SSI

I've seen the datasheet and i can't understand the register thing.

Can i use high level programming like :

SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA3_SSI0FSS);
GPIOPinConfigure(GPIO_PA4_SSI0RX);
GPIOPinConfigure(GPIO_PA5_SSI0TX);
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_3 |
GPIO_PIN_2);
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_1,
SSI_MODE_MASTER, SysCtlClockGet()/12, 16);
SSIEnable(SSI0_BASE);

To define all the above?

The first code is from a librarie.

  • Hi Victor,

    Victor Azevedo said:
    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);

    You, can find defines for SYSCTL_PERIPH_SSI0 and SYSCTL_PERIPH_SSI1 at sysctl.h. So, If you want to change to SSI1 just use SYSCTL_PERIPH_SSI1.

    Victor Azevedo said:
    GPIOPinConfigure(GPIO_PA2_SSI0CLK);
    GPIOPinConfigure(GPIO_PA3_SSI0FSS);
    GPIOPinConfigure(GPIO_PA4_SSI0RX);
    GPIOPinConfigure(GPIO_PA5_SSI0TX);

    Same explanation to the code lines above. Use the SSI1 equivalent parameters. The defines for the SSI1 equivalent parameters are at pin_map.h, under #ifdef PART_TM4C123GH6PM.

    -kel

  • Hi Victor,

    In the datasheet there's only offsets with values and some names. There are some headers that help you use those names istead of just numbers. it's hw_peripheral. For example, for the GPIO it's hw_gpio.h, for the ssi it's hw_ssi.h

    Of course if you are starting and you aren't used to the register programing you should use TivaWare, it's still C, so it's not that high up. That code does configure the SSI module 0, i can't confirm everytigh that it does the same as the code in direct register access since i don't use that often. Note that your code in TivaWare seems to configure the SSI CLK to be 12 times slower than the System CLK. 

    To configure the SSI1 in TivaWare you have to make the correct changes to the correct pins and SSI base