This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Ethernet Example on different version of RM48

Other Parts Discussed in Thread: HALCOGEN, MIO, DP83640

Hello,

I am using the Example project given on this link. I am regenerating the code using HalCoGen 4. It is working fine on the HDK board. I now need to make it work on my own board, the only thing being different that on HDK is that, the microcontroller is RM48L952PGE and the the main clock used and PLL settings need to be different. The transceiver is still clocked with a 50 MHz clock but is connected to RMII configuration instead of MII. I am getting stuck on getting PHY Id.

1) On the above mentioned link under "Programming Sequence using HALCoGen generated drivers" they ask us to set specific PLL. Is this necessary. Also they ask us to change the VClk4 to 40 MHz. In HalCoGen 4 when the controller loaded is RM48L952PGE, It does not give any option to change the VClk4 clock div as it does when I load the HDK.

2)What other changes would be required to shift from MII to RMII in the code?

Hope to hear from you soon,

Thank you,

Agraj.

  • Agraj,

    (1) You do not need VLCKA4 if an external crystal (50 MHz for RMII mode) is used.

    (2) You will need to configure the EMAC MACCONTROL register for RMII. The following code snip can be used as reference.

        if(speed_type == EMAC_RMII_10MBIT) {
          EMAC_REGS->MACCONTROL &= 0xFFFF7FFF;
        }
        if(speed_type == EMAC_RMII_100MBIT) {
          EMAC_REGS->MACCONTROL |= 0x00008000;
        }

    You will also need to configure PHY per PHY spec. For the MIO port, pull up resistors are required for both data and clock pins.

    Thanks and regards,

    Zhaohong

  • Hello,

    Thank you for the reply. I did add those lines of code by calling

    EMACRMIISpeedSet(hdkif->emac_base,EMAC_RMIISPEED_100MBPS);

    immediately after EMACMIIEnable is called inside hdkif.c. The EMACRMIISpeedSet was defined by HalCoGen in emac.c doing the same thing suggested. But there was no change. The program gets stuck before it reaches that part at

    phyID = Dp83640IDGet(hdkif->mdio_base, hdkif->phy_addr);

    This function is inside phy_dp83640.c Does HalCoGen generate this file only for MII mode. Can I change any option for the RMII mode. I assumed it is the same file as I am using the same PHY device as on the HDK.

    Hope to hear from you soon. 

    Thank you,

    Agraj. 

  • Hello,

    I have been contacting Texas Instrument for about a year to utilize the Ethernet port on the RM48L592 with PGE package using the RMII configuration.  Although I have been provided some hints and related software to accomplish this task, we have not been successful l as of now.

    To make matters simpler, we are now using the identical chip set for the Ethernet as the one you have on your development board (it is identical). The only difference on our boards now is the fact that I am using the PGE package and in the RMII configuration with a 50MHz clock.

    I am rather surprised that after many revisions in Halcogen and the associated software, Texas Instrument does not provide the configuration for the above settings. I highly appreciate it if you would provide me a final piece of code that manages to transfer data to the Ethernet port and back. I really do not  want to have  a possible fix or an intermediate piece of code. I NEED A WORKNG CODE. I hope that the Texas Instrument does support the customers with its products.

    I look forward to your expeditious response.

    Thank you,

    Agraj

  • Agraj,

    Are you looking at the lwip example code - or trying to start from scratch?  If you're not looking at the lwIP example already you might try it.  At least it runs on the HDKs.   There should be minimal differences between the 952 PGE and ZWT package w. regards to ethernet so I would think you would be able to get the lwip example running pretty easily.

    EDIT: lwIP example is here:  http://processors.wiki.ti.com/index.php/HALCoGen_Ethernet_Driver_and_lwIP_Integration_Demonstration

  • Hello,

    Yes I am trying LWIP example, and it is working on the HDK. As for the differences Other than ZWT and PGE, like I mentioned I am using RMII instead of MII. Since TI claims, RM48L592 can support Ethernet on RMII, I would assume HalCoGen should have a option to select that and it should generate corresponding dp83640.c file. But as far as I understand from previous reply it does not. I have tried to modify it and have not been successful. In spite of all these revisions of HalCoGen versions, there has been no RMII option added. Can I please get a working project demonstrating Ethernet with RMII. 


    Thank you,

    Agraj Jain

  • Agraj,

    I think it's out of the scope of HalCoGen to provide board-level files like a dp83640.c file in what is generated;  HalCoGen is focused on the low level device drivers especially initialization and diagnostics related for the Hercules MCUs.

    I can't really see enough information in this thread to conclude that the issue you are having is software related.

    The hardware needs to be hooked up differently if you want to put the DP83640 in RMII mode.  And it supports two different RMII modes (clock master & slave).   The very first thing I would do is to confirm that these things are setup correctly on your board.

    I am fairly sure (would need to dig up history on this) that the early versions of our HDK did use the DP83640 in RMII mode.  But we then thought based on preliminary char data that we were not going to meet the timing requirements of the RMII interface robustly (even if this worked on the bench) so we went so far as to take RMII out of the datasheet and revise the HDK hardware to use MII mode instead.   But then the final characterization data on a newer revision of silicon came back saying we could support RMII and hence the interface got put back in the datasheet.

    Anyway that's a long story but the moral of it is that I'm pretty certain we at least had a loopback test working through RMII on our own HDK boards at one time even though the current version doesn't support this.

    But that doesn't mean that you're having a Software issue.  So let's start out by confirming that you are actually strapping the DP83640 off in RMII mode and also that your choice of clock master is consistent between the two devices... (Hercules and Phy).

    You can post your schematic page here if you want or email it to me directly...

  • Hello,

    For the hardware connections I have only followed what was on the HDK schematics. I have attached the schematics here. Please let me know if any changes are required. If not, can you please give me a code that will work on this schematics. 

    Thank you,

    Agraj.

    2577.Eth.zip

  • Agraj,

    Anthony is correct.

    1.  You need to strap your PHY to power up in RMII mode, need a PU on pin39 see section 3.10 Strap Options. of your DS
    2. Also you need a pull-up on your MDIO line, see 6.4.2 Serial Management Access Protocol of your DS

    Thanks,

    Joe

  • Hello,

    I did go through the datasheet when we designed the schematics. As for the strappings you have mentioned,

    1. I have connected Pin 39 to "MII_RMII_SEL" and through that to the RM48. I did so as it was the same way done on the HDK development board schematics. There was no pull down there. It was held down by code through the controller. Which is why I was asking if you can provide analogous RMII code which in turn will hold that output up. 

    2. Section 6.4.2 of the DS says it is only for MII mode that is required. As per Section 6.2 the only pins used are the ones I have connected.

    Please advise me if any specific hardware changes are required. Else please provide an example of the RMII mode the RM48 Datasheets claims to have. 

    Thank you,

    Agraj Jain

  • Hello,

    I was wondering if there was any update on the usage of RMII on RM48 for ethernet yet? As you were not sure of it's working as mentioned in a previous mail by you on this thread, I hope you have an example project with RMII on RM48. I am still trying to get it to work. 

    Hope to hear from you soon,

    Agraj Jain

  • Agraj,

    Just thought about it.  We have RMII on a control card (Even though the schematic says not to use it in production ... but this comment is out of date now that the newer silicon rev's support it).

    Pls see http://processors.wiki.ti.com/index.php/RM48_CNCD

    There is a .zip file w. a lwIP example.  It's probably old but might be something for you to check your implementation against.   I haven't tried this demo myself and the engineer that posted isn't on our team anymore so can't ask, but I hope it works (or wouldn't have been posted to the TWIKI).

    -Anthony

  • Hello,

    As I have repeatedly mentioned before. I am trying to get RMII to work on RM48L952PGE. For this I need to make a change in the HalCoGen .hcg file. This is not included in the zip at the link you have sent me. Can you please send it to me.

    Thank you,

    Agraj Jain

  • Agraj,

    We don't have any kits that include the PGE package and ethernet,  so nothing canned that you can use.

    Not sure where the .hcg file is from this demo.  I can look for it.

    But have you tried just following the HalCoGen setup steps on the lwIP demo page.  That should get you very close without the HCG file.    Then you might want to do a diff between the CNCD ethernet driver files and what comes out of HalCoGen below to spot any changes for RMII that you might be missing. ..

    Configuring EMAC and MDIO using HALCoGen GUI

    The following sequence is to be followed to get working driver code for EMAC and MDIO modules using HALCoGen. A working implementation of this with lwIP is available at the end of this page.

    1. Under the ‘Driver Enable’ tab, enable EMAC Driver and SCI2 Driver.
    2. Under ‘VIM RAM’ add the names of the ISRs for EMAC Transmit and Receive Interrupts (Channels 77 and 79 respectively).
    3. Enable these interrupts under the ‘VIM Channel 64-95’ tab.
    4. Under the ‘PLL’ tab, change the multiplier for both PLLs to a value of 120, such that the output frequency in both cases is 160.00 MHz.
    5. Under the ‘GCM’ tab, change the value of the VCLKA4 Divider to 2, such that the output of VCLKA4( or VCLKA4_DIVR_EMAC in case of RM46x/TMS570LS12x Devices) is 40.00 MHz.
    6. Under the ‘PINMUX’ tab, enable RMII/MII, MDIO(G3) & MDCLK(V5).
    7. Under the ‘EMAC’ tab, change the EMAC address to 00:08:EE:03:A6:6C, which is the default MAC Address. Change the physical address to 1.
    8. Generate the system initialization and HAL Code.
  • Hello Anthony,

    As it is mentioned in the Datasheet, that we can use RMII on RM48LM592PGE for Ethernet, I do not understand how it was never tried and tested before sales. If it was, please just send me the schematics and a project with the same.

    Do let me know if you find the hcg file, I will gladly test it with the board whose schematics I have previously sent to you.

    As for generating from HalCoGen according to these specifications, Different Versions of Halcogen generate quite different code, for example in a previous version of the example, HalCoGen did not generate dp83640.c but newer ones it does. So before I can do that I need to know what version of HalCoGen was used to create the files in the zip you have mentioned in a previous mail.

    Also in the steps you have shown on the LwIP page, as far as I understand it is only pertinent to MII. As in steps 4 and 5 are not needed for RMII. Also it is not possible to follow step 5 for RM48LM592PGE. If you open GCM tab in HalCoGen for the PGE version, it does not give us the option to change the VCLK4 divider.

    Such limitations are something one would expect Texas Instruments to mention on a example page. I had to spend considerable amount of time before I got to know this through one of your representatives on the e2e forum.

    Please do advise me of the further steps you would recommend.