Hi there,
The only paragraph 28.5.2 in the TRM spnu499b explaining DMA for use with I2C doesn't provide enough information to let me understand the coupling between DMA and I2C.
Let say I configure the I2C module in Master Mode.
My understanding is that after enabling DMA in the I2CDMACR register and enable the repeat mode (RM=1), as soon as the START condition STT=1 is set, the DMA will take data synchronously with I2C TXRDY flag from the memory and write to the I2CDXR register. At the end of the TX I can have a DMA BTC interrupt to send the STOP condition STP=1. This seems to be fine with the transmitter mode.
Question: I should have configured the DMA to frame transfer mode with 1 element at a time, and this will be synchronized with the I2CWEVNT. Right?
For receiver mode, I need also to enable the repeat mode (RM=1), then write STT=1 to start. An I2CWEVNT will be generated and at this moment, the first byte containing the slave address PLUS R/nW=1 should be written. Should I setup a separate DMA only for this single byte?
I continue with my understanding ... since RM=1 and the master has requested READ, the data will be clocked in from the slave starting next byte up to the number of DMA programmed number of transfers by I2CREVNT. This sounds good but how about if I need to issue a NACK before reading the last byte? Should I set the DMA to transfer n-1 frames, generate BTC interrupt, then set NACKMOD=1, then read one more byte, then set STP=1 to end?
If so, I don't know how to synchronize all this since even after BTC, since RM is still set, the I2C module will continue to clock in data from the slave.
Thank you for clarifying all this.
