Hi,
in the ARM Manual for the Cortex-R4, the two configuration bits DEOLP and DILSM, which are part of the Auxiliary Control Register, should be enabled out of reset.
DEOLP -> 'Disable end of loop prediction'
DILSM -> 'Disable Low Interrupt Latency (LIL) on load/store multiples'
However, in the TMS570LS3137 those two bits are disabled.
Is there any reason for this or is it safe to turn those features on after coming out of a reset?
Kind regards,
Michael