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F021-API macro FAPI_GET_FSM_STATUS Bits PGV and CSTAT

Rainer Doerder
Prodigy 80 points
Other Parts Discussed in Thread: TMS570LS3137

Is set to program a TMS570LS3137 the library F021 API one.
A corresponding IP is loaded via JTAG to RAM and executes the library calls from.
The necessary work requests on a first board all customers.
We have now but another customer with a new board and the same CPU. All functions return normally, but when the IP Program call hangs.
The reason is the Macro FAPI_GET_FSM_STATUS. There are bits and PGV CSTAT displayed. According to TI forum that supposed to be an identifier, if the CPU's are at their interface useful life. A second new circuit board behaves the same way.
What changes in the settings of the CPU I can eliminate this effect, since the BlackHawk-Programmer "USB560 v2 System Trace" can handle this error screen appear.
 

Who can help me?

  • 0
    TI__Guru**** 199096 points

    Hello Rainer,

    is the error from the IDE which is trying to program the code to flash? or from your code that is used erase/write/read the flash? What is the API revision?

    Please pay attention when using API for flash operation in your code:

    1. place API and your flash operation function in SRAM, or different flash bank from the bank you want to erase

    2. make sure the frequency used in Fapi_initializeFlashBanks(Freq) is consistent to the system clock 

    3. make sure the sectors in Fapi_enableMainBankSectors(sectors) is defined correctly.

    Regards,

    QJ

     

  • 0 in reply to QJ Wang
    Prodigy 80 points

    Hello QJ,

    the first written program (IP) used the F021-API Version 02:00:01.
    Have now changed to version 02.1.00.
    The fault pattern has not changed (the first customer board is always programmed, new customers Board brings this error).

    To 1.
    The program runs in SRAM from 0x08000000 and treated the Flash Bank 0 or first
    The program components store (program / ​​data), erasing and reading work
    OK (ChipErase, Read Memory, readback).

    : 2.
    The settings of the frequency in the library is set to 80 MHz
    (Fapi_initializeFlashBanks (80)).
    On the first customers board a 8MHz crystal is fitted and the PLL is set to 80MHz.
    The new boards of other customers have a 16MHz quartz and ebenfals be set to 80MHz.
    PLLCTRL1: 0x21046300
    PLLCTRL2: 0x3FC0723D
    A variation of 16MHz to 180MHz brought no change in the error image. The only exception: at 16 MHz were single bit starting at address 0x00000000's (sector 0) but programmed with error stop.

    : 3.
    Sectors are banking manner set active.
    Excerpt from program sequence used:

    Fapi_initializeFlashBanks (80); / * Set frequency * /
    Fapi_setActiveFlashBank ((Fapi_FlashBankType) vBank); / * set active database * /
    Fapi_enableMainBankSectors (((vBank == 1) 0x0FFF: 0x7FFF); / * set active sectors * /

    while (Fapi_checkFsmForReady ()); / * Always OK * /

    Fapi_StatusType VSTATUS Fapi_issueProgrammingCommand = (
    (unsigned int *) vDstAddr,
    (unsigned char *) vBuffer,
                               vBytes,
                               0,
                               0,
                               Fapi_AutoEccGeneration);

    while (Fapi_checkFsmForReady ()); / * Always OK * /
    timeout = 10000;
    while (Fapi_getFsmStatus ()! = Fapi_Status_Success && --timeout)
    {
      return Fapi_getFsmStatus ();
    }

    Note:
    A reading and comparison of the Flash control register from 0xFFF87000 for a Progrmmierversuch brought full compliance with both boards.
    Conjecture (different flash pumping values​​, or something)

    Regards,

    Rainer
  • 0 in reply to Rainer Doerder
    Prodigy 80 points

    Hello QJ,

    I got the error gefunden.In the function low_level_init () in the IAR IDE, the PLL is set to a value of 180 MHz.

    This function is automatically lokatiert between start-up code and MAIN (). Since my PLL initialization
    previously carried this setting is overwritten.

    According to recent studies can the internal Flash program only up to 100MHz PLL frequency.
    Beyond this limit, shows the described error image with PGV CSTAT or function Fapi_initializeFlashBanks (xx) throws the error Fapi_Error_InvalidHclkValue.
    Both boards can be programmed now that the PLL Init functions are painted in low_level_init () and are pre-set to user-defined values​​.

    Thanks for the replies
    Rainer