More I2C woes

I have been struggling for a while with trying to get my TIVA part to communicate reliably with another IC on my custom board. I connected a logic analyzer and an o'scope to evaluate the SCL and SDA lines. My first move was to change the pull-up resistors to get better looking waveforms. After that, everything looked good - the logic analyzer was showing what I was sending, but I was still not getting reliable communication.

I then realized that SCL was running at 1 MHz. WTH? I called I2CMasterInitExpClk correctly (I think): 

  I2CMasterInitExpClk(I2C1_BASE, SysCtlClockGet(), false);

The documentation states that this should give a 100 KHz clock.

I then looked within the I2CMasterInitExpClk code and found this:

    // Compute the clock divider that achieves the fastest speed less than or
    // equal to the desired speed.  The numerator is biased to favor a larger
    // clock divider so that the resulting clock is always less than or equal
    // to the desired clock, never greater.
    //
    ui32TPR = ((ui32I2CClk + (2 * 10 * ui32SCLFreq) - 1) /
               (2 * 10 * ui32SCLFreq)) - 1;
    HWREG(ui32Base + I2C_O_MTPR) = ui32TPR;

    //
    // Check to see if this I2C peripheral is High-Speed enabled.  If yes, also
    // choose the fastest speed that is less than or equal to 3.4 Mbps.
    //
    if(HWREG(ui32Base + I2C_O_PP) & I2C_PP_HS)
    {
        ui32TPR = ((ui32I2CClk + (2 * 3 * 3400000) - 1) /
                   (2 * 3 * 3400000)) - 1;
        HWREG(ui32Base + I2C_O_MTPR) = I2C_MTPR_HS | ui32TPR;
    }

So it looks to me that things are setup to be the fastest clock under 3.4 Mbps.

If I manually change the I2C_O_MTPR register to 0x0A, SCL then runs at 500KHz and my communication is reliable.

What am I missing?

Thanks,

Jeff