As I want to capture samples and make use of the digital comparator on the same signal pin, it seems that the sequencer priority locks one part from the other.
I use ADC_TRIGGER_ALWAYS to capture all samples (@1MHz).
The ADC is captured into Sequencer 0 and the comparator signal into sequencer 3.
Any ideas how to fix this problem ?
My test code is:
vInitADCtest2(void)
{
SysCtlPeripheralReset(SYSCTL_PERIPH_ADC0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
SysCtlDelay(10);
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_3);
/*
// ******************************************************************************
// Initialization of ADC1 Module for Acquisition of the excitation Signal on PK3
// Settings:
// 1 Msps ^= 16MHz ADC clock
//
// Set up the Clock at | (VCO/15)/2 = (480/30) = 16MHz | which equals 1Msp/s
*/
ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL, 30);
ADCSequenceDisable(ADC0_BASE, ADC_SEQ);
ADCSequenceConfigure(ADC0_BASE, ADC_SEQ, ADC_TRIGGER_ALWAYS, 0);
ADCSequenceStepConfigure(ADC0_BASE, ADC_SEQ, 3, ADC_CTL_CH0 | ADC_CTL_IE | ADC_CTL_END);
ADCIntEnableEx(ADC0_BASE, ADC_INT_DMA_SS0);
ADCSequenceEnable(ADC0_BASE, ADC_SEQ);
//Comparator initialization
ADCSequenceDisable(ADC0_BASE, COMP_SEQ);
ADCSequenceStepConfigure(ADC0_BASE, COMP_SEQ, 0, ADC_CTL_CH0 | ADC_CTL_CMP0 | ADC_CTL_END);
ADCSequenceConfigure(ADC0_BASE, COMP_SEQ, ADC_TRIGGER_ALWAYS, 1);
ADCComparatorConfigure(ADC0_BASE, 0, ADC_COMP_INT_HIGH_ONCE);
ADCComparatorRegionSet(ADC0_BASE, 0, 0,TriggerLevel);
ADCComparatorReset(ADC0_BASE, 0, true, true);
ADCComparatorIntEnable(ADC0_BASE, COMP_SEQ);
ADCIntClear(ADC0_BASE, COMP_SEQ);
ADCSequenceEnable(ADC0_BASE, COMP_SEQ);
ADCIntEnableEx(ADC0_BASE, ADC_INT_DCON_SS3);
ADCIntEnable(ADC0_BASE,COMP_SEQ);
}
