AES peripheral module - debug problem

Hello Spandan89

1. SYSCTL_PERIPH_CCM0 is the correct macro for SysCtlPeripheralEnable to enable the clock to AES

2, The AES_BASE is a part of the CCM Address Space along with other crypto modules

3. The code needs to be published for us to see why it goes to exit.c

Regards

Amit

Hi Amit,

I think i may be omitting some of the include file, but i'm not sure. here is the coed.

#include <stdbool.h>
#include <stdint.h>
#include "driverlib/aes.h"
#include "driverlib/pin_map.h"
#include "driverlib/sysctl.h"
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"

uint32_t g_ui32AESPlainText[16] =
{
		0xe2bec16b, 0x969f402e, 0x117e3de9, 0x2a179373,
		0x578a2dae, 0x9cac031e, 0xac6fb79e, 0x518eaf45,
		0x461cc830, 0x11e45ca3, 0x19c1fbe5, 0xef520a1a,
		0x45249ff6, 0x179b4fdf, 0x7b412bad, 0x10376ce6
};


//
// Encryption key
//
uint32_t g_ui32AES128Key[4] =
{
		0x16157e2b, 0xa6d2ae28, 0x8815f7ab, 0x3c4fcf09
};


//
// Initial value for CBC mode.
//
uint32_t g_ui32AESIV[4] =
{
		0x03020100, 0x07060504, 0x0b0a0908, 0x0f0e0d0c
};


int main(void)
{
		uint32_t pui32CipherText[16];
		//
		// Enable the CCM module.
		//
		SysCtlPeripheralEnable(SYSCTL_PERIPH_CCM0);
		//
		// Wait for the CCM module to be ready.
		//
		while(!SysCtlPeripheralReady(SYSCTL_PERIPH_CCM0))
		{
		}
		//
		// Reset the AES module before use.
		//
		AESReset(AES_BASE);
		//
		// Configure the AES module.
		//
		AESConfigSet(AES_BASE,
		AES_CFG_DIR_ENCRYPT |
		AES_CFG_MODE_CBC |
		AES_CFG_KEY_SIZE_128BIT);
		//
		// Set the initial value.
		//
		AESIVSet(AES_BASE, g_ui32AESIV);
		//
		// Set the encryption key.
		//
		AESKey1Set(AES_BASE, g_ui32AES128Key, 0x80);
		//
		// Encrypt the data.
		//
		// The ciphertext should be:
		// {0xacab4976, 0x46b21981, 0x9b8ee9ce, 0x7d19e912,
		// 0x9bcb8650, 0xee197250, 0x3a11db95, 0xb2787691,
		// 0xb8d6be73, 0x3b74c1e3, 0x9ee61671, 0x16952222,
		// 0xa1caf13f, 0x09ac1f68, 0x30ca0e12, 0xa7e18675}
		//
		AESDataProcess(AES_BASE, g_ui32AESPlainText, pui32CipherText, 64);
}

Hello Spandan89,

It seems that the exit is being called after the program completes. Put a while(1) loop at the end to prevent it from going to exit handler.

Regards

Amit

Hi Amit,

I made a silly mistake. But i still dont understand the clock part? how is the peripheral getting the clock? AES involves polynomial mathematical operation which many xor operation between bytes of data. The only possible way is that, the controller is by default giving the clock to its peripheral. But then again, whats the clock value? 120MHz???

This is really beautiful encryption algorithm and it was fun to implement it in Virtex-5 FPGA.