EK-TM4C123GXL Low Frequency PWM

Hello Huseyin,

What is the System Clock and the PWM Divisor being configured on the TM4C123 LaunchPad.

Regards

Amit

Hi Amit,

System clock is running at 120 MHz, for PWM clock divisor, I tried 16, 32 and 64 but I couldn't generate such signals. 

huseyin

Hello Huseyin,

TM4C123 cannot run with a system clock of 120MHz. It is maximum rated for 80MHz.

Regards

Amit

 Hi Amit,

I am so sory, I confused with connected tiva launchpad. System clock that you asked is running at 40 MHz.

Regards,

huseyin

Hello Huseyin,

With a system clock of 40MHz and the PWM Divisor set to 64, the actual PWM clock would be 625KHz. With a 16-bit counter this would amount to a frequency as low as 9.5Hz PWM signal when in Up count mode or 4.8Hz if using Up-Down Count Mode. So it is possible to get  10Hz.signal with the maximum load value to the PWMLOAD register.

Can you share the code so that it can reviewed?

Regards

Amit

uint32_t period;
uint32_t deadband;
uint32_t cycle,freq;
SysCtlClockSet(SYSCTL_SYSDIV_2_5|SYSCTL_USE_PLL|SYSCTL_OSC_MAIN|SYSCTL_XTAL_16MHZ);
SysCtlPWMClockSet(SYSCTL_PWMDIV_64);
period = SysCtlClockGet()/6400;
deadband = period * 40/100;
cycle = period * 50/100;
period = SysCtlClockGet()/6400;

SysCtlPeripheralEnable(SYSCTL_PERIPH_PWM0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
GPIOPinConfigure(GPIO_PB6_M0PWM0);
GPIOPinConfigure(GPIO_PB7_M0PWM1);
GPIOPinTypePWM(GPIO_PORTB_BASE, GPIO_PIN_6);
GPIOPinTypePWM(GPIO_PORTB_BASE, GPIO_PIN_7);
PWMGenConfigure(PWM0_BASE, PWM_GEN_0, PWM_GEN_MODE_UP_DOWN |PWM_GEN_MODE_NO_SYNC);
PWMGenPeriodSet(PWM0_BASE, PWM_GEN_0, period);
PWMPulseWidthSet(PWM0_BASE, PWM_OUT_0, cycle);
PWMDeadBandEnable(PWM0_BASE, PWM_GEN_0, deadband, deadband);
PWMOutputState(PWM0_BASE, PWM_OUT_0_BIT | PWM_OUT_1_BIT , true);

PWMGenEnable(PWM0_BASE, PWM_GEN_0);
PWMOutputState(PWM0_BASE, PWM_OUT_0_BIT | PWM_OUT_1_BIT , true);

PWMGenEnable(PWM0_BASE, PWM_GEN_0);
while(1);

I get 100 Hz Square wave but deadband does not work properly.

huseyin

Hello Huseyin,

The SysCtlClockGet does not return 80000000 when the system clock is 80MHz. In the code above the System Clock is being set for 80MHz operation.

Instead use the value 80000000 when computing the period. Also why is the division being done by 6400?

Regards

Amit

Hi Amit,

Actually at this point system clock is not critical. You are right I got 40 000 000 from SysCtlClockGet and that is why I sad system clock is running at 40 MHz.

My frequency calculation was as follows, PWM clock is system clock divided by 64 if I set the period to system clock divided 64 I should get 1 Hz signal therefore I divided that value 100 to get 100 Hz signal. I was trying different frequencies. This was the last one.

Regards,

huseyin

Hi Amit,

Thank you for your help again. I divided system clock by 50 so I can generate signals down to 1 Hz with no problem. Final question, how can I implement this with 32 bit counters? Is it possible.

Thanks a lot.

huseyin

Hello Huseyin,

The PWM only has 16 bit counters. There is no provision for 32-bit

Regards

Amit