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help for external interrupt sample

Neha Nakate
Intellectual 325 points
Other Parts Discussed in Thread: HALCOGEN

Hi,

I am using RM46 HDK board and I want to develope a simple application code to test external interrupt.

I found  'S1' is a push button associated with GIOA7 (port pin) I want to use the same pin for external interrupt pin by making its status '0' the interrupt should be generated with its ISR.

Please kindly guide how to generate a code for it using HALCOGEN. attaching a sample I generated.

2766.R4F_new_samples.zip\

Please Help, I am new user of Texas RM46,

Thanks,

Neha.

 

 

  • 0
    TI__Mastermind 49120 points

    Hi Neha,

    You need to enable interrupt generation from the GIOA[7] input on the GIO tab in HALCoGen.

    Regards, Sunil

  • 0 in reply to Sunil Oak
    Intellectual 325 points

    Hi,

    I have done the above mentioned thing but still my sample is halted at the entry point I dont know whats going wrong with the code? Will you please check the code I am attaching. I want to write a simple code for external interrupt by GIOA7 push button with its interrupt notification where i need to toggle pin for LED on the same board ie RM46 HDK.

    8154.EXt_Int_1.zip

    Thanks.

     

  • 0 in reply to Neha Nakate
    Prodigy 65 points

    1. Setup GIOA7

    2. Setup VIM

    3. Code in main:

    gioInit();

    gioSetPort(hetPORT1,0); 

    gioSetDirection(hetPORT1,0x02000000);   // 25 is output

    gioEnableNotification(gioPORTA,7);

    _enable_IRQ();

    while(1);

    4. Code in gioNotification

    if(port == gioPORTA)

       if(bit==7) gioSetBit(hetPORT1,25,gioGetBit(hetPORT1,^1);

  • 0 in reply to Frank Bormann2
    TI__Mastermind 49120 points

    Thanks Frank (although the images you uploaded do not appear).

    Neha,

    There are the following "gates" in getting an interrupt from its source to the CPU:

    1. Module at interrupt source: For your example, the GIO module itself needs to enable generation of the interrupt request when the chosen rising/falling/either edge is detected on the selected pin
    2. Interrupt Manager (VIM): The interrupt request from the GIO module is tied to a particular interrupt channel on the VIM. You are using the GIO low-priority interrupt, which is mapped to channel 23 on VIM. The VIM REQENASET0 bit 23 needs to be set to enable this interrupt request to be signaled to the CPU.
    3. CPU: By default (after CPU reset), the CPU is configured to not respond to any interrupt requests (IRQ or FIQ). This is by virtue of the default states (1) of the "I" and "F" bits in the Current Program Status Register (CPSR). You need to clear these bits in the CPSR in order for the CPU to start responding to the IRQ and FIQ requests.

    Let me know if this is clear and if you are now able to generate the required interrupt from GIOA[7].

    Regards, Sunil