TM4C1290NCPDT Some Port Pins Issue

Thank you for clarifying.

Can you also clarify this question? You say the markings on the chip are TM4C1294NCPDT13 48ATYHW G4. That is not a TM4C1290NCPDT. Maybe you meant to type a 0?

Assuming it was a 0 you meant:

NMI is pin 128

JTAG/SWD pins are 97,98,99,100

So this is not a GPIO Commit (GPIOCR) or GPIO Lock (GPIOLOCK) register problem.

Alternate functions for pins 53-58 are:

53: PG4, I2C3SCL, SSI2XDAT1, U0CTS

54: PG5, I2C3SDA, SSI2XDAT0, U0RTS

55: PG6, I2C4SCL, SSI2Fss

56: PG7, I2C4SDA, SSI2Clk

57: PQ5, U1Tx

58: PQ6, U1DTR

So the following short program should assert a high logic level on all those pins. I apologize, I do not have the toolchain for the TM4C1290NCPDT installed, so this code could have errors with include files, constant names, or sysclock setup, and I would not realize it. But the GPIO setup should work as follows:

#include <stdbool.h>
#include <stdint.h>

#include "inc/hw_gpio.h"
#include "inc/hw_memmap.h"
#include "inc/hw_types.h"
#include "driverlib/pin_map.h"
#include "driverlib/rom.h"
#include "driverlib/sysctl.h"
#include "driverlib/gpio.h"

int main(void) {
	uint32_t sysclock;
	do {
		sysclock = ROM_SysCtlClockFreqSet(SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_480, 120*1000*1000);
	} while (!sysclock);

	ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
	ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ);

	while (!ROM_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOG)) ;
	while (!ROM_SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOQ)) ;

	ROM_GPIOPinTypeGPIOOutput(GPIO_PORTG_BASE, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);

	ROM_GPIOPinTypeGPIOOutput(GPIO_PORTQ_BASE, GPIO_PIN_5 | GPIO_PIN_6);

	ROM_GPIOPinWrite(GPIO_PORTG_BASE,
		GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7,
		GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);

	ROM_GPIOPinWrite(GPIO_PORTQ_BASE,
		GPIO_PIN_5 | GPIO_PIN_6,
		GPIO_PIN_5 | GPIO_PIN_6);


	// stop here, forever
	for (;;);
}