Hello,
I want to output VCLK clock. I have seen two registers which allow to output clock for test purpose, CLKTEST and ECPCNTL. I can successfully output a clock using CLKTEST register (at least SYSPC1 to SYSPC9 should be set correctly and in particular the ECPCLKFUN bit).
But the only way to output VCLK is by using ECPCNTL, but the only way I can get a clock is by setting CLK_TEST_EN to 5 in CLKTEST, which I think then override ECPCNTL settings...
What should I do in order to have VCLK on ECLK pin ? As ECLK pin buffer is limited to 20MHz is it possible to output GCLK with CLKTEST and still use the divider defined in ECPCNTL ? What am i missing ?
Thanks