I'm having issues properly pushing my packets to the TXFIFO
I have variable packet length configured and set TX to transition to IDLE when the packet has completed sending.
The issue I'm seeing is that instead of transitioning to IDLE I end up transitioning to TXUNDERFLOW.
I'm building my packets as follows
CC110LSelect(); // indicate burst write to the FIFO SSIDataPut(SSI_BASE, BURST | FIFO); // push the packet length (+2 for length/address bytes) SSIDataPut(SSI_BASE, packetlength + 2); // push the rx address SSIDataPut(SSI_BASE, 0x00); for (i=0; i<packetlength; i++) { SSIDataPut(SSI_BASE, buffer[i]); } // wait for ssi operations to complete while(SSIBusy(SSI_BASE)); CC110LDeselect(); // transition to the transmit state CC110LStrobeWrite(STX); CC110LWaitForTxFifoEmpty();
My final function WaitForTxFifoEmpty() just polls the MARCSTATE until it enters TX_UNDERFLOW or IDLE.
For some reason with the code as is always exits the loop in underflow.
If I decrease the `+2` to `+1` the loop exits in IDLE mode but I'm not sure if the final byte ever gets sent or if it's still sitting on the FIFO.
I'm not sure if the packet length I'm sending the device is too long (perhaps a length of 0 means 1).