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How to save the context before periodic PBIST and LBIST ?

In our project we were told that must  execute periodic LBIST and PBIST.

About the LBIST, SPNU503B says that some of the registers  required to be backed up like CPU core registers and so on.

I don't know how to back up registers, could you give me some suggestions about backing up registers ?

About the PBIST, I don't konw how to back up RAM content ? Save the content to FLASH or other methods ? If saving to FLASH is the only way to back up RAM, how to save the content to FLASH and If you know the time cost of saving RAM to FLASH ?

Thank you!

  • Hi,

    You can save the context to internal SRAM. You probably should put some CRC around the context store to allow for your startup code to check that it's valid. I don't see an example of this part of the process in the SafeTI Diagnostic Library though so you'll need to code this yourself.
    The RAM isn't affected by the LBIST (which is a test of the CPU).

    Regarding PBIST, there are some options. First, you need to decide whether or not to run PBIST just once at startup or if you need to run it periodically. If you run it just at startup then saving the RAM contents isn't so important. But if you do need to run periodically, then you have to find a place to save a backup copy of your data if you need to retain the data, since the test is 'destructive' i.e. it'll write over the contents.

    The internal RAM on the RM48x is broken into 4 groups for PBIST testing, PD #1, RAM PD#1, RAM PD#2, RAM PD#3, with each group being 64KBytes. (These areas are also referred to as ESRAM1, ESRAM5, ESRAM6 and ESRAM8 for some reason ...)

    So you could limit your app to use 192K of SRAM and keep 64K as a storage area to save backups of the other groups contents while they are being tested.

    Or you could use an external memory to save the context but be careful because the external memory controller doesn't include ECC support, so you might need to add CRCs or add block-type ECC information to your storage so you can detect corruption that might occur while the contents are external.

    I don't think you can use on chip Flash - for various reasons it's not practical. Not to mention the least of which is that flash has limited Write/Erase cycle capability and you would use that quickly if you tried storing backup data there.
  • Dear Seely,
    Thank you very much !

    Is there any methods to limit the bound of the RAM ?
    I see the RAM address is from 0x08000000 to 0x0830FFFF, but how to just use pd#1,pd#2 and pd#3 in normal application?
  • Hi User1411371,

    Glad to be of some help - thank you!

    I took a few screenshots and added the ESRAM notation to these tables from the datasheet.  Hopefully this fills in the missing information.